00001 /* 00002 Copyright (C) Intel Corp. 2006. All Rights Reserved. 00003 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to 00004 develop this 3D driver. 00005 00006 Permission is hereby granted, free of charge, to any person obtaining 00007 a copy of this software and associated documentation files (the 00008 "Software"), to deal in the Software without restriction, including 00009 without limitation the rights to use, copy, modify, merge, publish, 00010 distribute, sublicense, and/or sell copies of the Software, and to 00011 permit persons to whom the Software is furnished to do so, subject to 00012 the following conditions: 00013 00014 The above copyright notice and this permission notice (including the 00015 next paragraph) shall be included in all copies or substantial 00016 portions of the Software. 00017 00018 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 00019 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 00020 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 00021 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 00022 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 00023 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 00024 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 00025 00026 **********************************************************************/ 00027 /* 00028 * Authors: 00029 * Keith Whitwell <keith@tungstengraphics.com> 00030 */ 00031 00032 00033 #include "brw_context.h" 00034 #include "brw_state.h" 00035 #include "brw_defines.h" 00036 00037 #include "util/u_math.h" 00038 #include "util/u_memory.h" 00039 00040 static void upload_vs_unit( struct brw_context *brw ) 00041 { 00042 struct brw_vs_unit_state vs; 00043 00044 memset(&vs, 0, sizeof(vs)); 00045 00046 /* CACHE_NEW_VS_PROG */ 00047 vs.thread0.kernel_start_pointer = brw->vs.prog_gs_offset >> 6; 00048 vs.thread0.grf_reg_count = align(brw->vs.prog_data->total_grf, 16) / 16 - 1; 00049 vs.thread3.urb_entry_read_length = brw->vs.prog_data->urb_read_length; 00050 vs.thread3.const_urb_entry_read_length = brw->vs.prog_data->curb_read_length; 00051 vs.thread3.dispatch_grf_start_reg = 1; 00052 00053 00054 /* BRW_NEW_URB_FENCE */ 00055 vs.thread4.nr_urb_entries = brw->urb.nr_vs_entries; 00056 vs.thread4.urb_entry_allocation_size = brw->urb.vsize - 1; 00057 vs.thread4.max_threads = MIN2( 00058 MAX2(0, (brw->urb.nr_vs_entries - 6) / 2 - 1), 00059 15); 00060 00061 00062 00063 if (BRW_DEBUG & DEBUG_SINGLE_THREAD) 00064 vs.thread4.max_threads = 0; 00065 00066 /* BRW_NEW_CURBE_OFFSETS, _NEW_TRANSFORM */ 00067 if (0 /*brw->attribs.Clip->ClipPlanesEnabled*/) { 00068 /* Note that we read in the userclip planes as well, hence 00069 * clip_start: 00070 */ 00071 vs.thread3.const_urb_entry_read_offset = brw->curbe.clip_start * 2; 00072 } 00073 else { 00074 vs.thread3.const_urb_entry_read_offset = brw->curbe.vs_start * 2; 00075 } 00076 00077 vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; 00078 vs.thread3.urb_entry_read_offset = 0; 00079 00080 /* No samplers for ARB_vp programs: 00081 */ 00082 vs.vs5.sampler_count = 0; 00083 00084 if (BRW_DEBUG & DEBUG_STATS) 00085 vs.thread4.stats_enable = 1; 00086 00087 /* Vertex program always enabled: 00088 */ 00089 vs.vs6.vs_enable = 1; 00090 00091 brw->vs.state_gs_offset = brw_cache_data( &brw->cache[BRW_VS_UNIT], &vs ); 00092 } 00093 00094 00095 const struct brw_tracked_state brw_vs_unit = { 00096 .dirty = { 00097 .brw = (BRW_NEW_CLIP | 00098 BRW_NEW_CURBE_OFFSETS | 00099 BRW_NEW_URB_FENCE), 00100 .cache = CACHE_NEW_VS_PROG 00101 }, 00102 .update = upload_vs_unit 00103 };