09:59fomys: (moved from #freedesktop)
09:59fomys: Hi,
09:59fomys: I am the new VKMS maintainer, and I want to commit this: https://lore.kernel.org/all/20241014145009.3360515-1-mairacanal@riseup.net/
09:59fomys: I just added my Acked-by yesterday.
09:59fomys: How long should I wait before commiting?
09:59fomys: How should I commit? From the documentation I found this process, do I miss something?
09:59fomys: - dim checkout drm-misc-next
09:59fomys: - dim b4-shazam <mail-id>
09:59fomys: - dim checkpatch <series>
09:59fomys: - dim sparse <series>
09:59fomys: - dim push-branch drm-misc-next
09:59fomys: Thanks,
09:59fomys: Louis Chauvet
10:43mupuf: fomys: 24h is definitely enough
10:43mupuf:can't comment on the how to merge... it's been too long since I last pushed anything to dim
10:44fomys: Thanks for the delay confirmation, I will wait for someone else to confirm the process to push, thanks !
12:36mripard: fomys: dim ub, dim b4-shazam, dim push. And if you think the doc could be better, please send a doc update after it :)
14:29fomys: I just pushed it, I hope I did things correctly!
15:15fomys: On my VKMS work, I just ran the CI to see how it works / fix the broken tests, I have few questions:
15:15fomys: - Is there an easy why to tell "please run vkms:none and all its dependency"? I don't need the whole pipeline to be run, only the vkms dependencies.
15:15fomys: - On the results (https://gitlab.freedesktop.org/louischauvet/kernel/-/jobs/65883946), if I understand correctly I need to mark some test as Pass in the corresponding vkms-none-fails.txt (UnexpectedImprovement on kms_cursor_crc)
15:15fomys: - On the same results, I have timeouts on kms_plane@pixel-format, is there a way to increase the timeout? As vkms will support many new formats, 60s will not be sufficient I think.
15:15fomys: - Do I have to do anything with the flakes test? I don't understand if kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic is passing or not in this run
15:15fomys: - Is there a way to run the tests on a different architecture? As VKMS is doing a lot of buffer manipulation I would like to test at least on arm64.
15:20claudiasheapers: https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=b62ba07317ab5425de114034b2e42cdbc64419fc Cornell again this is another subject as to how high standards they do compute chip researches, however you can see the 1bit adders 0 combinations and trace vs wire selection probabilities, where as the entropy is very high the deposited topology of a bus is simpler also, so the
15:20claudiasheapers: debate as to why they use more resources i tend to think for a reason and for good intentions for sw reservation for superior performance, in my opinion with hardware it's very good hence too. But it's also very plausible that some vendors do not get pciex16 entirely right for cheaper pricetag based boards. It was quite good thing to know that nvidia get's it always correct, so i
15:20claudiasheapers: would know what boards to prefer,i could then choose jetson boards for the future, i have one apple old tablet which is nice , i would expect that apple gets such things correct too.
15:21claudiasheapers: . We use
15:21claudiasheapers: at to denote a high voltage value on input a and af to
15:21claudiasheapers: denote a low voltage value on input a. The operation
15:21claudiasheapers: of adding two zeros can be depicted by the set of traces
15:21claudiasheapers: faf bf cf sf ; af bf sf cf ; bf af cf sf ; bf af sf cf g.
15:22claudiasheapers: that is the bisect of the text you want to look at.
15:53mripard: fomys: afaics, you did. and fyi, b4 ty is super helpful if you use b4-shazam
15:54fomys: Yes, I know, I already use b4, very nice tool to not be lost in my series :)
17:37dbrouwer: fomys: about the CI: 1) to run vkms:none and all its dependencies you can use the ci_run_n_monitor.sh tool in mesa, it works for other gitlab pipelines too. Run it like this:
17:37dbrouwer: ./bin/ci/ci_run_n_monitor.sh --pipeline-url https://gitlab.freedesktop.org/louischauvet/kernel/-/pipelines/1300934 --target vkms:none
17:37dbrouwer: 2) Fix the UnexpectedImprovements e.g. kms_cursor_crc@cursor-rapid-movement-128x128, by just removing them entirely from the *fails.txt, you don’t have to mark them as Pass
17:37dbrouwer: 3) The timeouts are not coming from ci, but somewhere in IGT I think
17:37dbrouwer: 4) KnownFlakes e.g. kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic you don’t have to do anything, just leave them, they count as a pass for ci
17:37dbrouwer: 5) To run the tests on arm64 you would need to write a new ci job
17:38fomys: Thanks for all of this! I will use this tool!
17:41fomys: For now I will not update the *fails.txt, I may found a flakiness in vkms (https://gitlab.freedesktop.org/louischauvet/kernel/-/jobs/65944002). I am currently investigating to know if this is an existing issue (my current guess because I don't see yet how my series can generate this)
17:41fomys: If this is an existing issue (kernel crash == pipeline fail), how should I do? Can I commit other series before fixing it? Should I fix it first?
17:47fomys: Ok, it is not my fault, the issue was there before: https://gitlab.freedesktop.org/jim.cromie/kernel-drm-next-dd/-/jobs/61803193, https://gitlab.freedesktop.org/jim.cromie/kernel-drm-next-dd/-/jobs/61484201
17:47fomys: It is in the same time a good new (my series does not break stuff), and a bad new (I have to investigate a race-condition issue that I never had in 8 month of developing VKMS and running igt tests)
17:48fomys: (thanks jim.cromie to run this ci often :-))
18:05pearlsathand: I know it is army pdf, and i know it exactly my formula, but i do not think they copied it from me, russians have it as well, and i did not program this to them. I know that i am smart too, and i know many things, as to how you tried to kill me with military after milking my substances from marrow, as i know that those people will be found in sequence their own balls in throat and the
18:05pearlsathand: abusesluts won't get less brutal treatment, it is because you tried to kill me but i was too strong for you, you mistreated for decades the proud of the humanly gods, sure you get responses to this and you are dead meat already quite soon, just my lines have not kept up with the long queue, Charl, jack and Simon will be treated, sluts will be treated if they bother our businesses again
18:05pearlsathand: with violative remarks. Generally there was long set of abusers identified in cambodia, those are all found quite soon without signs of life in their cells. We do not care about your theatre where you play victim your own, estonians and jews will be treated in stacks yet as well. I know my head is yet not injured cause i see real things, but i do not know why they did not succeed in
18:05pearlsathand: injuring it when they tried so madly, rest of the body is injured heavy lawlessly conspiredly. I do not think it's up to me to sace devils, authorities will get to them with brutal treatment. So yes i do not think i leaked anything besides what they did with my cells, cause i have aware of my strong geneology and resistance of viruses kind of mutation, long time ago. And i do not think
18:05pearlsathand: they backtracked the entropy pdf-s either. Americans and Russians are smart people, but i gave none to russians, cause i likely do not fancy wars between similar races.
18:32Company: jenatali: do you have some more of that magic format mapping code? Apparently glTexStorageMem2DEXT() thinks I need to know how to map dxgi formats to gl formats
18:32Company: and gallium's d3d12_format.c works with pipe formats, not gl formats
18:35jenatali: So you want the GL to pipe mapping?
18:35Company: GL to DXGI
18:36jenatali: You won't find a one-stop path in Mesa, it goes through pipe formats
18:36Company: yeah, that's why I'm asking
18:36Company: I was hoping you knew some place
18:36jenatali: Not offhand but pipe formats map to DXGI pretty cleanly so with the GL to pipe mapping you should be good
18:37jenatali: ANGLE might have it?
18:38Company: that's a good idea
18:41Company: https://github.com/google/angle/blob/main/src/libANGLE/renderer/d3d/d3d11/texture_format_map.json
19:49mairacanal: fomys, i remember having issues with kms_cursor_crc@cursor-rapid-movement-512x512
19:52mairacanal: seeing the CI log reminded me of https://lore.kernel.org/dri-devel/24864732-dd34-a391-f5c3-27783765794d@riseup.net/T/#mf1186769f3d505b17f2da8c140d7cd20a407e145
20:23alyssa: oof. nir_opt_algebraic eats nuw bits
20:24alyssa: maybe this is the wrong way to go about this..
20:24alyssa: I'm trying to plumb through nuw on the ishl's generated by nir_lower_io and nir_lower_uniforms_to_ubo
20:25alyssa: so that I can promote the 32-bit ishl to a 64-bit ishl that I can fold into my hardware op (64 + zext(32) << shift)
20:26alyssa: (which is faster than `64 + zext(32 << shift)` which requires an extra instruction for the shift. The hw semantic is perfect for C based languages, including OpenCL. but nir_lower_io doesnt play nice)
20:31alyssa: wondering if other hw has this problem
20:57karolherbst: I think nvidia has a native instruction for those things
20:58karolherbst: it's kinda like LEA, no?
20:58karolherbst: though I think x86 doesn't have the shift
21:02alyssa: karolherbst: I *need* to plumb through the shift for correctness ..
21:02karolherbst: yeah...
21:03karolherbst: but I mean nvidia has an instruction for (64 + zext(32) << shift) and it's called LEA there
21:03alyssa: sure
21:03alyssa: so IDK. nir_lower_io can set nuw but nir opt algebraic needs to not destroy it
21:03alyssa: and we dont have infra to preserve nuw/nsw bits in algebraic..
21:04karolherbst: mhhh
21:04karolherbst: yeah...
21:04karolherbst: or add a lea instruction and drivers lower it
21:05karolherbst: but might make sense to figure out all the semantics first...
21:05karolherbst: the shift for nvidia is a 5 bit constant
21:06alyssa: right so if we have a dedicated instructions we lose all the existing ishl patterns
21:06alyssa: it's very chicken and egg
21:06alyssa: though maybe that's still.. better overall
21:07karolherbst: I mean.. if lower_io emits the lea
21:07karolherbst: and then we either keep it or lower it?
21:07karolherbst: could also make lea have those semantics
21:08alyssa: Hmm
21:08karolherbst: it's a single native instruction, so not really much harm you can do here
21:08alyssa: Part of the problem is that I'm doing the AGX lowering late, because I kind of have to do some optimization to remove the crap that comes out of i/o lowering first
21:08karolherbst: ehh well.. 2 for nvidia if you want 64 bit result
21:08alyssa: but could probably do it earlierish
21:09karolherbst: mhh I see
21:09karolherbst: but I'd love to see a native lea instruction, because there is hardware who could make use of it
21:18alyssa: i dont see how that would work usefully crossvendor
22:12alyssa: hmm. I definitely need to restructure somethings and probably need to duplicate a few ops but
22:12alyssa: there are worse things
22:12alyssa: ops and opts
22:13alyssa: current idea is to introduce an aadd similar to the amul we have now
22:13alyssa: so then we can do the fast and loose optimizations for addressing
22:14alyssa: and then fuse into a lea32 which has the semantic of "a + zext(b << c)" where the shift is guaranteed not to overflow s.t. we can impl in hw as "a + zext(b) << c" if profitable
22:14alyssa: but don't have to if not
22:15alyssa: just really unclear *when* that opt should happen
22:15alyssa: do it too early, you impede other opts
22:15alyssa: do it too late, you lose the nuw info you needed
22:15alyssa: plumbing amul/aadd thru works but with the impeding other ops so then I need to copypaste things like `aadd(x, 0) -> x` rules
22:16alyssa: and then you get funny mismatches like `aadd(iadd(x, #y), #z)`...
22:16alyssa: that's the same as iadd(x, #(y+z))
22:17alyssa: ...but is the same as aadd(x, #(y+z))?
22:17alyssa: ^is it
22:17alyssa: strictly no.. the inner iadd could overflow..
22:17alyssa: in some ways opencl addressing is so much easier
22:18alyssa: it's just always 64-bit, no shenanigans
23:31freeturntoleft: It is that the event was all the same, like where as chips did not work, they had to injure me more , and last three i analysed again in last three years, unfortunately the video tape does not show in tt-cup that i am playing totally disabled , so it's i know that justice will be served there and all those people involved in all 50injuring cases get slaughtered unless they turn
23:31freeturntoleft: themselves in to authorities. In addition russians kill all the clowns who live to bother others with humiliations too, i know they hate trash like this and it is perfectly allowed by me. So all in all, yeah i am disabled now as last injuries i picked up was neck and tendons, and with 20injuries on my body, i retired to try to do sports again, i live but they won't anymore unless they
23:31freeturntoleft: turn themselves in and regret their lawless actions. And i do not have time to deal with fools like this here, i have much to learn but seeing such people around is not encouraging , so i need to deal with my own or find new ones. You never saw a bigger fighter as terrorized to handycap and balance of goodness , smartness and justice serving person all in one, as i was for community,
23:31freeturntoleft: so fuck off from my sight trashbags and put your banana into the sluts anus, i left them many years ago, cause i was dry favoured over scum like you. I said i do not want your trash, if you come to gang stalk me again, bullets are in your bodies. And for your luck, i did not even manage to graduate vim editor, much of the network studies, and too much of the science studies at all, so
23:31freeturntoleft: you be a senseless set of heroes if you will, but do not show your faces near me .
23:31freeturntoleft: cheers.