Results for shaders/glsl-fs-loop-nested

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.0933668613434
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/glsl-fs-loop-nested -auto
errors_ignored 
  • 0x11f1b60: i32,ch = load 0x11f1360, 0x11f1860, 0x11f1560<LD4[%1]> [ID=28]
  • 0x11f4d00: i64 = Register %vreg31 [ID=20]
  • 0x11f1b60: i32,ch = load 0x11f1360, 0x11f1860, 0x11f1560<LD4[%1]> [ID=28]
  • 0x11f4d00: i64 = Register %vreg31 [ID=20]
errors 
  • LLVM ERROR: Cannot select: 0x11f7e80: i32 = sra 0x11f7d80, 0x11f4700 [ID=43]
  • 0x11f7d80: i32 = add 0x11f1a60, 0x11f7c80 [ID=41]
  • 0x11f1a60: i32 = fp_to_sint 0x11f4600 [ORD=5] [ID=36]
  • 0x11f4600: f32 = bitcast 0x11f1b60 [ID=32]
  • 0x11f1860: i64 = add 0x11f4d00, 0x11f1760 [ORD=3] [ID=24]
  • 0x11f1760: i64 = Constant<12> [ORD=3] [ID=5]
  • 0x11f1560: i64 = undef [ORD=2] [ID=4]
  • 0x11f7c80: i32 = srl 0x11f4900, 0x11f6260 [ID=40]
  • 0x11f4900: i32 = sra 0x11f1a60, 0x11f4500 [ID=39]
  • 0x11f1a60: i32 = fp_to_sint 0x11f4600 [ORD=5] [ID=36]
  • 0x11f4600: f32 = bitcast 0x11f1b60 [ID=32]
  • 0x11f1860: i64 = add 0x11f4d00, 0x11f1760 [ORD=3] [ID=24]
  • 0x11f1760: i64 = Constant<12> [ORD=3] [ID=5]
  • 0x11f1560: i64 = undef [ORD=2] [ID=4]
  • 0x11f4500: i64 = Constant<31> [ID=17]
  • 0x11f6260: i64 = Constant<30> [ID=18]
  • 0x11f4700: i64 = Constant<2> [ID=16]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x11f7e80: i32 = sra 0x11f7d80, 0x11f4700 [ID=43]
  0x11f7d80: i32 = add 0x11f1a60, 0x11f7c80 [ID=41]
    0x11f1a60: i32 = fp_to_sint 0x11f4600 [ORD=5] [ID=36]
      0x11f4600: f32 = bitcast 0x11f1b60 [ID=32]
        0x11f1b60: i32,ch = load 0x11f1360, 0x11f1860, 0x11f1560<LD4[%1]> [ID=28]
          0x11f1860: i64 = add 0x11f4d00, 0x11f1760 [ORD=3] [ID=24]
            0x11f4d00: i64 = Register %vreg31 [ID=20]
            0x11f1760: i64 = Constant<12> [ORD=3] [ID=5]
          0x11f1560: i64 = undef [ORD=2] [ID=4]
    0x11f7c80: i32 = srl 0x11f4900, 0x11f6260 [ID=40]
      0x11f4900: i32 = sra 0x11f1a60, 0x11f4500 [ID=39]
        0x11f1a60: i32 = fp_to_sint 0x11f4600 [ORD=5] [ID=36]
          0x11f4600: f32 = bitcast 0x11f1b60 [ID=32]
            0x11f1b60: i32,ch = load 0x11f1360, 0x11f1860, 0x11f1560<LD4[%1]> [ID=28]
              0x11f1860: i64 = add 0x11f4d00, 0x11f1760 [ORD=3] [ID=24]
                0x11f4d00: i64 = Register %vreg31 [ID=20]
                0x11f1760: i64 = Constant<12> [ORD=3] [ID=5]
              0x11f1560: i64 = undef [ORD=2] [ID=4]
        0x11f4500: i64 = Constant<31> [ID=17]
      0x11f6260: i64 = Constant<30> [ID=18]
  0x11f4700: i64 = Constant<2> [ID=16]
In function: main


Output:

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