Status: fail
Result: fail
Detail | Value |
---|---|
returncode | 1 |
time | 0.12624502182 |
note | Returncode was 1 |
command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/shaders/glsl-vs-loop-redundant-condition.shader_test -auto |
errors_ignored |
|
info | Returncode: 1 Errors: LLVM ERROR: Cannot select: 0xa9e990: i32 = sign_extend 0xa9aaa0 [ID=22] 0xa9aaa0: i1 = VCC_BITCAST 0xaa06b0 [ID=21] 0xaa06b0: i64 = and 0xa9e590, 0xa9a9a0 [ID=20] 0xa9e590: i64 = VCC_BITCAST 0xa9a6a0 [ID=19] 0xa9a6a0: i1 = setcc 0xa95400, 0xa94f00, 0xa94e00 [ORD=89] [ID=17] 0xa95400: i32 = bitcast 0xa95a00 [ORD=88] [ID=15] 0xa95a00: f32,ch = CopyFromReg 0xa5f330, 0xa95b00 [ORD=88] [ID=13] 0xa95b00: f32 = Register %vreg5 [ORD=88] [ID=1] 0xa94f00: i32 = Constant<5> [ORD=89] [ID=2] 0xa9a9a0: i64 = VCC_BITCAST 0xa9ffb0 [ID=18] 0xa9ffb0: i1 = setcc 0xa95400, 0xaa05b0, 0xa94e00 [ORD=93] [ID=16] 0xa95400: i32 = bitcast 0xa95a00 [ORD=88] [ID=15] 0xa95a00: f32,ch = CopyFromReg 0xa5f330, 0xa95b00 [ORD=88] [ID=13] 0xa95b00: f32 = Register %vreg5 [ORD=88] [ID=1] 0xaa05b0: i32 = Constant<4> [ORD=93] [ID=4] In function: main Output: |
errors |
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