Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.119467973709 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/ext_framebuffer_multisample-interpolation 0 non-centroid-deriv -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
warning: failed to translate tgsi opcode DDX to LLVM
Failed to translate shader from TGSI to LLVM
EE ../../../../../src/gallium/drivers/radeonsi/si_state.c:1907 si_shader_select - Failed to build shader variant (type=1) -22
LLVM ERROR: Cannot select: 0x219d820: i32 = truncate 0x219b900 [ID=165]
0x219b900: i64 = srl 0x219d720, 0x2191910 [ID=164]
0x219d720: i64 = mul 0x219cb10, 0x219d520 [ID=163]
0x219cb10: i64 = zero_extend 0x219d620 [ID=162]
0x219d620: i32 = select 0x219c410, 0x219c010, 0x219c110 [ID=160]
0x219c410: i1 = setcc 0x21a0070, 0x2188c70, 0x219bc00 [ID=141]
0x21a0070: i32 = truncate 0x219de20 [ID=139]
0x219de20: i64 = srl 0x219dd20, 0x2191910 [ID=137]
0x219dd20: i64 = mul 0x219d920, 0x219be00 [ID=134]
0x219d920: i64 = zero_extend 0x218dcd0 [ID=131]
0x219be00: i64 = zero_extend 0x218bab0 [ID=126]
0x2191910: i64 = Constant<32> [ORD=108] [ID=16]
0x2188c70: i32 = Constant<0> [ORD=7] [ID=6]
0x219c010: i32 = add 0x218dcd0, 0x219dc20 [ID=157]
0x218dcd0: i32 = URECIP 0x218bab0 [ID=127]
0x218bab0: i32 = xor 0x218b8b0, 0x218b6b0 [ID=119]
0x218b8b0: i32 = add 0x218dfd0, 0x218b6b0 [ID=114]
0x218dfd0: i32,ch = load 0x2188d70:1, 0x218d200, 0x2188570<LD4[%85]> [ID=80]
0x218b6b0: i32 = sra 0x218dfd0, 0x219ba00 [ID=103]
0x218b6b0: i32 = sra 0x218dfd0, 0x219ba00 [ID=103]
0x218dfd0: i32,ch = load 0x2188d70:1, 0x218d200, 0x2188570<LD4[%85]> [ID=80]
0x219ba00: i64 = Constant<31> [ID=41]
0x219dc20: i32 = truncate 0x219db20 [ID=151]
0x219db20: i64 = srl 0x219da20, 0x2191910 [ID=149]
0x219da20: i64 = mul 0x219c310, 0x219d920 [ID=147]
0x219c310: i64 = zero_extend 0x219c210 [ID=145]
0x219d920: i64 = zero_extend 0x218dcd0 [ID=131]
0x2191910: i64 = Constant<32> [ORD=108] [ID=16]
0x219c110: i32 = sub 0x218dcd0, 0x219dc20 [ID=158]
0x218dcd0: i32 = URECIP 0x218bab0 [ID=127]
0x218bab0: i32 = xor 0x218b8b0, 0x218b6b0 [ID=119]
0x218b8b0: i32 = add 0x218dfd0, 0x218b6b0 [ID=114]
0x218dfd0: i32,ch = load 0x2188d70:1, 0x218d200, 0x2188570<LD4[%85]> [ID=80]
0x218b6b0: i32 = sra 0x218dfd0, 0x219ba00 [ID=103]
0x218b6b0: i32 = sra 0x218dfd0, 0x219ba00 [ID=103]
0x218dfd0: i32,ch = load 0x2188d70:1, 0x218d200, 0x2188570<LD4[%85]> [ID=80]
0x219ba00: i64 = Constant<31> [ID=41]
0x219dc20: i32 = truncate 0x219db20 [ID=151]
0x219db20: i64 = srl 0x219da20, 0x2191910 [ID=149]
0x219da20: i64 = mul 0x219c310, 0x219d920 [ID=147]
0x219c310: i64 = zero_extend 0x219c210 [ID=145]
0x219d920: i64 = zero_extend 0x218dcd0 [ID=131]
0x2191910: i64 = Constant<32> [ORD=108] [ID=16]
0x219d520: i64 = zero_extend 0x218b9b0 [ID=121]
0x218b9b0: i32 = xor 0x218b7b0, 0x21a0170 [ID=116]
0x218b7b0: i32 = add 0x218e3d0, 0x21a0170 [ID=111]
0x218e3d0: i32,ch = load 0x2188d70:1, 0x218c600, 0x2188570<LD4[%56]> [ID=79]
0x218c600: i64 = add 0x2197770, 0x218c500 [ORD=21] [ID=44]
0x2197770: i64 = Register %vreg0 [ID=35]
0x218c500: i64 = Constant<16> [ORD=21] [ID=9]
0x2188570: i64 = undef [ORD=3] [ID=4]
0x21a0170: i32 = sra 0x218e3d0, 0x219ba00 [ID=100]
0x218e3d0: i32,ch = load 0x2188d70:1, 0x218c600, 0x2188570<LD4[%56]> [ID=79]
0x218c600: i64 = add 0x2197770, 0x218c500 [ORD=21] [ID=44]
0x2197770: i64 = Register %vreg0 [ID=35]
0x218c500: i64 = Constant<16> [ORD=21] [ID=9]
0x2188570: i64 = undef [ORD=3] [ID=4]
0x219ba00: i64 = Constant<31> [ID=41]
0x21a0170: i32 = sra 0x218e3d0, 0x219ba00 [ID=100]
0x218e3d0: i32,ch = load 0x2188d70:1, 0x218c600, 0x2188570<LD4[%56]> [ID=79]
0x218c600: i64 = add 0x2197770, 0x218c500 [ORD=21] [ID=44]
0x2197770: i64 = Register %vreg0 [ID=35]
0x218c500: i64 = Constant<16> [ORD=21] [ID=9]
0x2188570: i64 = undef [ORD=3] [ID=4]
0x219ba00: i64 = Constant<31> [ID=41]
0x2191910: i64 = Constant<32> [ORD=108] [ID=16]
In function: main
Output:
|