Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.0943019390106 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-div-int-ivec2.shader_test -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
LLVM ERROR: Cannot select: 0x1844af0: i32 = truncate 0x18449f0 [ID=88]
0x18449f0: i64 = srl 0x18448f0, 0x1837cc0 [ID=86]
0x18448f0: i64 = mul 0x1840b60, 0x18434d0 [ID=84]
0x1840b60: i64 = zero_extend 0x18438d0 [ID=82]
0x18438d0: i32 = select 0x183ff40, 0x183fb40, 0x183fc40 [ID=80]
0x183ff40: i1 = setcc 0x18451f0, 0x18377c0, 0x183b2b0 [ID=64]
0x18451f0: i32 = truncate 0x18450f0 [ID=62]
0x18450f0: i64 = srl 0x1844ff0, 0x1837cc0 [ID=60]
0x1844ff0: i64 = mul 0x1844bf0, 0x183fa40 [ID=57]
0x1844bf0: i64 = zero_extend 0x183abb0 [ID=53]
0x183fa40: i64 = zero_extend 0x183c3d0 [ID=49]
0x1837cc0: i64 = Constant<32> [ORD=3] [ID=4]
0x18377c0: i32 = Constant<0> [ORD=1] [ID=2]
0x183fb40: i32 = add 0x183abb0, 0x1844ef0 [ID=77]
0x183abb0: i32 = URECIP 0x183c3d0 [ID=50]
0x183c3d0: i32 = xor 0x183b0b0, 0x183bbd0 [ID=45]
0x183b0b0: i32 = add 0x183aeb0, 0x183bbd0 [ID=42]
0x183aeb0: i32,ch = load 0x18378c0, 0x183aab0, 0x1837ac0<LD4[%14]> [ID=30]
0x183bbd0: i32 = sra 0x183aeb0, 0x183f740 [ID=36]
0x183bbd0: i32 = sra 0x183aeb0, 0x183f740 [ID=36]
0x183aeb0: i32,ch = load 0x18378c0, 0x183aab0, 0x1837ac0<LD4[%14]> [ID=30]
0x183f740: i64 = Constant<31> [ID=19]
0x1844ef0: i32 = truncate 0x1844df0 [ID=74]
0x1844df0: i64 = srl 0x1844cf0, 0x1837cc0 [ID=72]
0x1844cf0: i64 = mul 0x183fe40, 0x1844bf0 [ID=70]
0x183fe40: i64 = zero_extend 0x183fd40 [ID=68]
0x1844bf0: i64 = zero_extend 0x183abb0 [ID=53]
0x1837cc0: i64 = Constant<32> [ORD=3] [ID=4]
0x183fc40: i32 = sub 0x183abb0, 0x1844ef0 [ID=78]
0x183abb0: i32 = URECIP 0x183c3d0 [ID=50]
0x183c3d0: i32 = xor 0x183b0b0, 0x183bbd0 [ID=45]
0x183b0b0: i32 = add 0x183aeb0, 0x183bbd0 [ID=42]
0x183aeb0: i32,ch = load 0x18378c0, 0x183aab0, 0x1837ac0<LD4[%14]> [ID=30]
0x183bbd0: i32 = sra 0x183aeb0, 0x183f740 [ID=36]
0x183bbd0: i32 = sra 0x183aeb0, 0x183f740 [ID=36]
0x183aeb0: i32,ch = load 0x18378c0, 0x183aab0, 0x1837ac0<LD4[%14]> [ID=30]
0x183f740: i64 = Constant<31> [ID=19]
0x1844ef0: i32 = truncate 0x1844df0 [ID=74]
0x1844df0: i64 = srl 0x1844cf0, 0x1837cc0 [ID=72]
0x1844cf0: i64 = mul 0x183fe40, 0x1844bf0 [ID=70]
0x183fe40: i64 = zero_extend 0x183fd40 [ID=68]
0x1844bf0: i64 = zero_extend 0x183abb0 [ID=53]
0x1837cc0: i64 = Constant<32> [ORD=3] [ID=4]
0x18434d0: i64 = zero_extend 0x183b7b0 [ID=46]
0x183b7b0: i32 = xor 0x183b1b0, 0x18452f0 [ID=43]
0x183b1b0: i32 = add 0x183acb0, 0x18452f0 [ID=38]
0x183acb0: i32,ch = load 0x18378c0, 0x1837dc0, 0x1837ac0<LD4[%10]> [ID=28]
0x1837dc0: i64 = add 0x18384c0, 0x1837cc0 [ORD=3] [ID=23]
0x18384c0: i64 = Register %vreg0 [ID=16]
0x1837cc0: i64 = Constant<32> [ORD=3] [ID=4]
0x1837ac0: i64 = undef [ORD=2] [ID=3]
0x18452f0: i32 = sra 0x183acb0, 0x183f740 [ID=32]
0x183acb0: i32,ch = load 0x18378c0, 0x1837dc0, 0x1837ac0<LD4[%10]> [ID=28]
0x1837dc0: i64 = add 0x18384c0, 0x1837cc0 [ORD=3] [ID=23]
0x18384c0: i64 = Register %vreg0 [ID=16]
0x1837cc0: i64 = Constant<32> [ORD=3] [ID=4]
0x1837ac0: i64 = undef [ORD=2] [ID=3]
0x183f740: i64 = Constant<31> [ID=19]
0x18452f0: i32 = sra 0x183acb0, 0x183f740 [ID=32]
0x183acb0: i32,ch = load 0x18378c0, 0x1837dc0, 0x1837ac0<LD4[%10]> [ID=28]
0x1837dc0: i64 = add 0x18384c0, 0x1837cc0 [ORD=3] [ID=23]
0x18384c0: i64 = Register %vreg0 [ID=16]
0x1837cc0: i64 = Constant<32> [ORD=3] [ID=4]
0x1837ac0: i64 = undef [ORD=2] [ID=3]
0x183f740: i64 = Constant<31> [ID=19]
0x1837cc0: i64 = Constant<32> [ORD=3] [ID=4]
In function: main
Output:
|