Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.112862825394 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-div-ivec2-int.shader_test -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
LLVM ERROR: Cannot select: 0xb7aa30: i32 = truncate 0xb7a830 [ID=71]
0xb7a830: i64 = srl 0xb79200, 0xb6fb60 [ID=69]
0xb79200: i64 = mul 0xb79d20, 0xb7a620 [ID=67]
0xb79d20: i64 = zero_extend 0xb7a930 [ID=65]
0xb7a930: i32 = select 0xb77de0, 0xb779e0, 0xb77ae0 [ID=64]
0xb77de0: i1 = setcc 0xb7b330, 0xb6f660, 0xb73150 [ID=56]
0xb7b330: i32 = truncate 0xb7b230 [ID=55]
0xb7b230: i64 = srl 0xb7b130, 0xb6fb60 [ID=54]
0xb7b130: i64 = mul 0xb7ad30, 0xb778e0 [ID=52]
0xb7ad30: i64 = zero_extend 0xb72a50 [ID=50]
0xb778e0: i64 = zero_extend 0xb74270 [ID=47]
0xb6fb60: i64 = Constant<32> [ORD=3] [ID=4]
0xb6f660: i32 = Constant<0> [ORD=1] [ID=2]
0xb779e0: i32 = add 0xb72a50, 0xb7b030 [ID=62]
0xb72a50: i32 = URECIP 0xb74270 [ID=48]
0xb74270: i32 = xor 0xb72f50, 0xb73a70 [ID=44]
0xb72f50: i32 = add 0xb72e50, 0xb73a70 [ID=40]
0xb72e50: i32,ch = load 0xb6f760, 0xb70060, 0xb6f960<LD4[%14]> [ID=29]
0xb73a70: i32 = sra 0xb72e50, 0xb775e0 [ID=34]
0xb73a70: i32 = sra 0xb72e50, 0xb775e0 [ID=34]
0xb72e50: i32,ch = load 0xb6f760, 0xb70060, 0xb6f960<LD4[%14]> [ID=29]
0xb775e0: i64 = Constant<31> [ID=19]
0xb7b030: i32 = truncate 0xb7af30 [ID=61]
0xb7af30: i64 = srl 0xb7ae30, 0xb6fb60 [ID=60]
0xb7ae30: i64 = mul 0xb77ce0, 0xb7ad30 [ID=59]
0xb77ce0: i64 = zero_extend 0xb77be0 [ID=58]
0xb7ad30: i64 = zero_extend 0xb72a50 [ID=50]
0xb6fb60: i64 = Constant<32> [ORD=3] [ID=4]
0xb77ae0: i32 = sub 0xb72a50, 0xb7b030 [ID=63]
0xb72a50: i32 = URECIP 0xb74270 [ID=48]
0xb74270: i32 = xor 0xb72f50, 0xb73a70 [ID=44]
0xb72f50: i32 = add 0xb72e50, 0xb73a70 [ID=40]
0xb72e50: i32,ch = load 0xb6f760, 0xb70060, 0xb6f960<LD4[%14]> [ID=29]
0xb73a70: i32 = sra 0xb72e50, 0xb775e0 [ID=34]
0xb73a70: i32 = sra 0xb72e50, 0xb775e0 [ID=34]
0xb72e50: i32,ch = load 0xb6f760, 0xb70060, 0xb6f960<LD4[%14]> [ID=29]
0xb775e0: i64 = Constant<31> [ID=19]
0xb7b030: i32 = truncate 0xb7af30 [ID=61]
0xb7af30: i64 = srl 0xb7ae30, 0xb6fb60 [ID=60]
0xb7ae30: i64 = mul 0xb77ce0, 0xb7ad30 [ID=59]
0xb77ce0: i64 = zero_extend 0xb77be0 [ID=58]
0xb7ad30: i64 = zero_extend 0xb72a50 [ID=50]
0xb6fb60: i64 = Constant<32> [ORD=3] [ID=4]
0xb7a620: i64 = zero_extend 0xb762c0 [ID=49]
0xb762c0: i32 = xor 0xb73c70, 0xb73d70 [ID=45]
0xb73c70: i32 = add 0xb72d50, 0xb73d70 [ID=42]
0xb72d50: i32,ch = load 0xb6f760, 0xb72950, 0xb6f960<LD4[%10]> [ID=30]
0xb72950: i64 = add 0xb72c50, 0xb72850 [ORD=12] [ID=25]
0xb72c50: i64 = Register %vreg0 [ID=16]
0xb72850: i64 = Constant<36> [ORD=12] [ID=6]
0xb6f960: i64 = undef [ORD=2] [ID=3]
0xb73d70: i32 = sra 0xb72d50, 0xb775e0 [ID=36]
0xb72d50: i32,ch = load 0xb6f760, 0xb72950, 0xb6f960<LD4[%10]> [ID=30]
0xb72950: i64 = add 0xb72c50, 0xb72850 [ORD=12] [ID=25]
0xb72c50: i64 = Register %vreg0 [ID=16]
0xb72850: i64 = Constant<36> [ORD=12] [ID=6]
0xb6f960: i64 = undef [ORD=2] [ID=3]
0xb775e0: i64 = Constant<31> [ID=19]
0xb73d70: i32 = sra 0xb72d50, 0xb775e0 [ID=36]
0xb72d50: i32,ch = load 0xb6f760, 0xb72950, 0xb6f960<LD4[%10]> [ID=30]
0xb72950: i64 = add 0xb72c50, 0xb72850 [ORD=12] [ID=25]
0xb72c50: i64 = Register %vreg0 [ID=16]
0xb72850: i64 = Constant<36> [ORD=12] [ID=6]
0xb6f960: i64 = undef [ORD=2] [ID=3]
0xb775e0: i64 = Constant<31> [ID=19]
0xb6fb60: i64 = Constant<32> [ORD=3] [ID=4]
In function: main
Output:
|