Status: fail
Result: fail
Detail | Value |
---|---|
returncode | 1 |
time | 0.0939910411835 |
note | Returncode was 1 |
command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-div-ivec3-int.shader_test -auto |
errors_ignored |
|
errors |
|
info | Returncode: 1 Errors: LLVM ERROR: Cannot select: 0xb66bc0: i32 = truncate 0xb69670 [ID=86] 0xb69670: i64 = srl 0xb67d40, 0xb5b8a0 [ID=83] 0xb67d40: i64 = mul 0xb68340, 0xb69570 [ID=80] 0xb68340: i64 = zero_extend 0xb69870 [ID=77] 0xb69870: i32 = select 0xb65bb0, 0xb656a0, 0xb658b0 [ID=76] 0xb65bb0: i1 = setcc 0xb6aca0, 0xb5b3a0, 0xb5f7b0 [ID=68] 0xb6aca0: i32 = truncate 0xb6aba0 [ID=67] 0xb6aba0: i64 = srl 0xb6a170, 0xb5b8a0 [ID=66] 0xb6a170: i64 = mul 0xb69d70, 0xb655a0 [ID=64] 0xb69d70: i64 = zero_extend 0xb5fdb0 [ID=62] 0xb655a0: i64 = zero_extend 0xb61c20 [ID=58] 0xb5b8a0: i64 = Constant<32> [ORD=3] [ID=4] 0xb5b3a0: i32 = Constant<0> [ORD=1] [ID=2] 0xb656a0: i32 = add 0xb5fdb0, 0xb6a070 [ID=74] 0xb5fdb0: i32 = URECIP 0xb61c20 [ID=59] 0xb61c20: i32 = xor 0xb5fcb0, 0xb5f390 [ID=54] 0xb5fcb0: i32 = add 0xb5ed90, 0xb5f390 [ID=48] 0xb5ed90: i32,ch = load 0xb5b4a0, 0xb5bda0, 0xb5b6a0<LD4[%23]> [ID=33] 0xb5f390: i32 = sra 0xb5ed90, 0xb652a0 [ID=40] 0xb5f390: i32 = sra 0xb5ed90, 0xb652a0 [ID=40] 0xb5ed90: i32,ch = load 0xb5b4a0, 0xb5bda0, 0xb5b6a0<LD4[%23]> [ID=33] 0xb652a0: i64 = Constant<31> [ID=21] 0xb6a070: i32 = truncate 0xb69f70 [ID=73] 0xb69f70: i64 = srl 0xb69e70, 0xb5b8a0 [ID=72] 0xb69e70: i64 = mul 0xb65ab0, 0xb69d70 [ID=71] 0xb65ab0: i64 = zero_extend 0xb659b0 [ID=70] 0xb69d70: i64 = zero_extend 0xb5fdb0 [ID=62] 0xb5b8a0: i64 = Constant<32> [ORD=3] [ID=4] 0xb658b0: i32 = sub 0xb5fdb0, 0xb6a070 [ID=75] 0xb5fdb0: i32 = URECIP 0xb61c20 [ID=59] 0xb61c20: i32 = xor 0xb5fcb0, 0xb5f390 [ID=54] 0xb5fcb0: i32 = add 0xb5ed90, 0xb5f390 [ID=48] 0xb5ed90: i32,ch = load 0xb5b4a0, 0xb5bda0, 0xb5b6a0<LD4[%23]> [ID=33] 0xb5f390: i32 = sra 0xb5ed90, 0xb652a0 [ID=40] 0xb5f390: i32 = sra 0xb5ed90, 0xb652a0 [ID=40] 0xb5ed90: i32,ch = load 0xb5b4a0, 0xb5bda0, 0xb5b6a0<LD4[%23]> [ID=33] 0xb652a0: i64 = Constant<31> [ID=21] 0xb6a070: i32 = truncate 0xb69f70 [ID=73] 0xb69f70: i64 = srl 0xb69e70, 0xb5b8a0 [ID=72] 0xb69e70: i64 = mul 0xb65ab0, 0xb69d70 [ID=71] 0xb65ab0: i64 = zero_extend 0xb659b0 [ID=70] 0xb69d70: i64 = zero_extend 0xb5fdb0 [ID=62] 0xb5b8a0: i64 = Constant<32> [ORD=3] [ID=4] 0xb69570: i64 = zero_extend 0xb63a40 [ID=60] 0xb63a40: i32 = xor 0xb63940, 0xb63640 [ID=55] 0xb63940: i32 = add 0xb5f090, 0xb63640 [ID=50] 0xb5f090: i32,ch = load 0xb5b4a0, 0xb5e690, 0xb5b6a0<LD4[%10]> [ID=34] 0xb5e690: i64 = add 0xb5e990, 0xb5e590 [ORD=12] [ID=27] 0xb5e990: i64 = Register %vreg0 [ID=18] 0xb5e590: i64 = Constant<36> [ORD=12] [ID=6] 0xb5b6a0: i64 = undef [ORD=2] [ID=3] 0xb63640: i32 = sra 0xb5f090, 0xb652a0 [ID=42] 0xb5f090: i32,ch = load 0xb5b4a0, 0xb5e690, 0xb5b6a0<LD4[%10]> [ID=34] 0xb5e690: i64 = add 0xb5e990, 0xb5e590 [ORD=12] [ID=27] 0xb5e990: i64 = Register %vreg0 [ID=18] 0xb5e590: i64 = Constant<36> [ORD=12] [ID=6] 0xb5b6a0: i64 = undef [ORD=2] [ID=3] 0xb652a0: i64 = Constant<31> [ID=21] 0xb63640: i32 = sra 0xb5f090, 0xb652a0 [ID=42] 0xb5f090: i32,ch = load 0xb5b4a0, 0xb5e690, 0xb5b6a0<LD4[%10]> [ID=34] 0xb5e690: i64 = add 0xb5e990, 0xb5e590 [ORD=12] [ID=27] 0xb5e990: i64 = Register %vreg0 [ID=18] 0xb5e590: i64 = Constant<36> [ORD=12] [ID=6] 0xb5b6a0: i64 = undef [ORD=2] [ID=3] 0xb652a0: i64 = Constant<31> [ID=21] 0xb5b8a0: i64 = Constant<32> [ORD=3] [ID=4] In function: main Output: |