Results for spec/glsl-1.10/execution/built-in-functions/fs-op-div-ivec3-ivec3

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.0809850692749
note
Returncode was 1
command
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-div-ivec3-ivec3.shader_test -auto
errors_ignored
  • 0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]
  • 0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]
  • 0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]
  • 0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]
  • 0x9f9b90: i32,ch = load 0x9f5480, 0x9f8f70, 0x9f5680<LD4[%19]> [ID=40]
  • 0x9f9990: i64 = Register %vreg0 [ID=20]
  • 0x9f9b90: i32,ch = load 0x9f5480, 0x9f8f70, 0x9f5680<LD4[%19]> [ID=40]
  • 0x9f9990: i64 = Register %vreg0 [ID=20]
  • 0x9f9b90: i32,ch = load 0x9f5480, 0x9f8f70, 0x9f5680<LD4[%19]> [ID=40]
  • 0x9f9990: i64 = Register %vreg0 [ID=20]
errors
  • LLVM ERROR: Cannot select: 0xa05d00: i32 = truncate 0xa037c0 [ID=134]
  • 0xa037c0: i64 = srl 0xa05c00, 0x9f5880 [ID=131]
  • 0xa05c00: i64 = mul 0xa04be0, 0xa05a00 [ID=128]
  • 0xa04be0: i64 = zero_extend 0xa05b00 [ID=125]
  • 0xa05b00: i32 = select 0xa045e0, 0xa041e0, 0xa042e0 [ID=122]
  • 0xa045e0: i1 = setcc 0xa06400, 0x9f5380, 0x9f9f90 [ID=98]
  • 0xa06400: i32 = truncate 0xa06300 [ID=95]
  • 0xa06300: i64 = srl 0xa00180, 0x9f5880 [ID=92]
  • 0xa00180: i64 = mul 0xa05f00, 0xa03bc0 [ID=88]
  • 0xa05f00: i64 = zero_extend 0x9f8d70 [ID=82]
  • 0xa03bc0: i64 = zero_extend 0x9fe8f0 [ID=76]
  • 0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
  • 0x9f5380: i32 = Constant<0> [ORD=1] [ID=2]
  • 0xa041e0: i32 = add 0x9f8d70, 0xa06200 [ID=118]
  • 0x9f8d70: i32 = URECIP 0x9fe8f0 [ID=77]
  • 0x9fe8f0: i32 = xor 0x9fe6f0, 0x9fe4f0 [ID=68]
  • 0x9fe6f0: i32 = add 0x9f9a90, 0x9fe4f0 [ID=62]
  • 0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]
  • 0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]
  • 0xa00280: i64 = Constant<31> [ID=23]
  • 0xa06200: i32 = truncate 0xa06000 [ID=113]
  • 0xa06000: i64 = srl 0xa01ba0, 0x9f5880 [ID=110]
  • 0xa01ba0: i64 = mul 0xa044e0, 0xa05f00 [ID=107]
  • 0xa044e0: i64 = zero_extend 0xa043e0 [ID=104]
  • 0xa05f00: i64 = zero_extend 0x9f8d70 [ID=82]
  • 0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
  • 0xa042e0: i32 = sub 0x9f8d70, 0xa06200 [ID=119]
  • 0x9f8d70: i32 = URECIP 0x9fe8f0 [ID=77]
  • 0x9fe8f0: i32 = xor 0x9fe6f0, 0x9fe4f0 [ID=68]
  • 0x9fe6f0: i32 = add 0x9f9a90, 0x9fe4f0 [ID=62]
  • 0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]
  • 0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]
  • 0xa00280: i64 = Constant<31> [ID=23]
  • 0xa06200: i32 = truncate 0xa06000 [ID=113]
  • 0xa06000: i64 = srl 0xa01ba0, 0x9f5880 [ID=110]
  • 0xa01ba0: i64 = mul 0xa044e0, 0xa05f00 [ID=107]
  • 0xa044e0: i64 = zero_extend 0xa043e0 [ID=104]
  • 0xa05f00: i64 = zero_extend 0x9f8d70 [ID=82]
  • 0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
  • 0xa05a00: i64 = zero_extend 0x9fe7f0 [ID=75]
  • 0x9fe7f0: i32 = xor 0x9fe5f0, 0x9fe1f0 [ID=67]
  • 0x9fe5f0: i32 = add 0x9f9b90, 0x9fe1f0 [ID=60]
  • 0x9f8f70: i64 = add 0x9f9990, 0x9f8e70 [ORD=21] [ID=31]
  • 0x9f8e70: i64 = Constant<40> [ORD=21] [ID=8]
  • 0x9f5680: i64 = undef [ORD=2] [ID=3]
  • 0x9fe1f0: i32 = sra 0x9f9b90, 0xa00280 [ID=50]
  • 0x9f8f70: i64 = add 0x9f9990, 0x9f8e70 [ORD=21] [ID=31]
  • 0x9f8e70: i64 = Constant<40> [ORD=21] [ID=8]
  • 0x9f5680: i64 = undef [ORD=2] [ID=3]
  • 0xa00280: i64 = Constant<31> [ID=23]
  • 0x9fe1f0: i32 = sra 0x9f9b90, 0xa00280 [ID=50]
  • 0x9f8f70: i64 = add 0x9f9990, 0x9f8e70 [ORD=21] [ID=31]
  • 0x9f8e70: i64 = Constant<40> [ORD=21] [ID=8]
  • 0x9f5680: i64 = undef [ORD=2] [ID=3]
  • 0xa00280: i64 = Constant<31> [ID=23]
  • 0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
  • In function: main
info
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0xa05d00: i32 = truncate 0xa037c0 [ID=134]
  0xa037c0: i64 = srl 0xa05c00, 0x9f5880 [ID=131]
    0xa05c00: i64 = mul 0xa04be0, 0xa05a00 [ID=128]
      0xa04be0: i64 = zero_extend 0xa05b00 [ID=125]
        0xa05b00: i32 = select 0xa045e0, 0xa041e0, 0xa042e0 [ID=122]
          0xa045e0: i1 = setcc 0xa06400, 0x9f5380, 0x9f9f90 [ID=98]
            0xa06400: i32 = truncate 0xa06300 [ID=95]
              0xa06300: i64 = srl 0xa00180, 0x9f5880 [ID=92]
                0xa00180: i64 = mul 0xa05f00, 0xa03bc0 [ID=88]
                  0xa05f00: i64 = zero_extend 0x9f8d70 [ID=82]

                  0xa03bc0: i64 = zero_extend 0x9fe8f0 [ID=76]

                0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
            0x9f5380: i32 = Constant<0> [ORD=1] [ID=2]
          0xa041e0: i32 = add 0x9f8d70, 0xa06200 [ID=118]
            0x9f8d70: i32 = URECIP 0x9fe8f0 [ID=77]
              0x9fe8f0: i32 = xor 0x9fe6f0, 0x9fe4f0 [ID=68]
                0x9fe6f0: i32 = add 0x9f9a90, 0x9fe4f0 [ID=62]
                  0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]


                  0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]


                0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]
                  0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]


                  0xa00280: i64 = Constant<31> [ID=23]
            0xa06200: i32 = truncate 0xa06000 [ID=113]
              0xa06000: i64 = srl 0xa01ba0, 0x9f5880 [ID=110]
                0xa01ba0: i64 = mul 0xa044e0, 0xa05f00 [ID=107]
                  0xa044e0: i64 = zero_extend 0xa043e0 [ID=104]

                  0xa05f00: i64 = zero_extend 0x9f8d70 [ID=82]

                0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
          0xa042e0: i32 = sub 0x9f8d70, 0xa06200 [ID=119]
            0x9f8d70: i32 = URECIP 0x9fe8f0 [ID=77]
              0x9fe8f0: i32 = xor 0x9fe6f0, 0x9fe4f0 [ID=68]
                0x9fe6f0: i32 = add 0x9f9a90, 0x9fe4f0 [ID=62]
                  0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]


                  0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]


                0x9fe4f0: i32 = sra 0x9f9a90, 0xa00280 [ID=52]
                  0x9f9a90: i32,ch = load 0x9f5480, 0x9f9370, 0x9f5680<LD4[%23]> [ID=41]


                  0xa00280: i64 = Constant<31> [ID=23]
            0xa06200: i32 = truncate 0xa06000 [ID=113]
              0xa06000: i64 = srl 0xa01ba0, 0x9f5880 [ID=110]
                0xa01ba0: i64 = mul 0xa044e0, 0xa05f00 [ID=107]
                  0xa044e0: i64 = zero_extend 0xa043e0 [ID=104]

                  0xa05f00: i64 = zero_extend 0x9f8d70 [ID=82]

                0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
      0xa05a00: i64 = zero_extend 0x9fe7f0 [ID=75]
        0x9fe7f0: i32 = xor 0x9fe5f0, 0x9fe1f0 [ID=67]
          0x9fe5f0: i32 = add 0x9f9b90, 0x9fe1f0 [ID=60]
            0x9f9b90: i32,ch = load 0x9f5480, 0x9f8f70, 0x9f5680<LD4[%19]> [ID=40]
              0x9f8f70: i64 = add 0x9f9990, 0x9f8e70 [ORD=21] [ID=31]
                0x9f9990: i64 = Register %vreg0 [ID=20]
                0x9f8e70: i64 = Constant<40> [ORD=21] [ID=8]
              0x9f5680: i64 = undef [ORD=2] [ID=3]
            0x9fe1f0: i32 = sra 0x9f9b90, 0xa00280 [ID=50]
              0x9f9b90: i32,ch = load 0x9f5480, 0x9f8f70, 0x9f5680<LD4[%19]> [ID=40]
                0x9f8f70: i64 = add 0x9f9990, 0x9f8e70 [ORD=21] [ID=31]
                  0x9f9990: i64 = Register %vreg0 [ID=20]
                  0x9f8e70: i64 = Constant<40> [ORD=21] [ID=8]
                0x9f5680: i64 = undef [ORD=2] [ID=3]
              0xa00280: i64 = Constant<31> [ID=23]
          0x9fe1f0: i32 = sra 0x9f9b90, 0xa00280 [ID=50]
            0x9f9b90: i32,ch = load 0x9f5480, 0x9f8f70, 0x9f5680<LD4[%19]> [ID=40]
              0x9f8f70: i64 = add 0x9f9990, 0x9f8e70 [ORD=21] [ID=31]
                0x9f9990: i64 = Register %vreg0 [ID=20]
                0x9f8e70: i64 = Constant<40> [ORD=21] [ID=8]
              0x9f5680: i64 = undef [ORD=2] [ID=3]
            0xa00280: i64 = Constant<31> [ID=23]
    0x9f5880: i64 = Constant<32> [ORD=3] [ID=4]
In function: main


Output:

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