Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.0865399837494 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-div-ivec4-int.shader_test -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
LLVM ERROR: Cannot select: 0x260a1a0: i32 = truncate 0x260ceb0 [ID=101]
0x260ceb0: i64 = srl 0x260b990, 0x25fb850 [ID=97]
0x260b990: i64 = mul 0x260bf90, 0x260cdb0 [ID=93]
0x260bf90: i64 = zero_extend 0x260d1b0 [ID=89]
0x260d1b0: i32 = select 0x2607e70, 0x2607a70, 0x2607b70 [ID=88]
0x2607e70: i1 = setcc 0x260dec0, 0x25fb350, 0x25ffd10 [ID=80]
0x260dec0: i32 = truncate 0x260ddc0 [ID=79]
0x260ddc0: i64 = srl 0x260dcc0, 0x25fb850 [ID=78]
0x260dcc0: i64 = mul 0x260d8c0, 0x2607970 [ID=76]
0x260d8c0: i64 = zero_extend 0x25ffc10 [ID=74]
0x2607970: i64 = zero_extend 0x2603590 [ID=69]
0x25fb850: i64 = Constant<32> [ORD=3] [ID=4]
0x25fb350: i32 = Constant<0> [ORD=1] [ID=2]
0x2607a70: i32 = add 0x25ffc10, 0x260dbc0 [ID=86]
0x25ffc10: i32 = URECIP 0x2603590 [ID=70]
0x2603590: i32 = xor 0x2601770, 0x25ffb10 [ID=64]
0x2601770: i32 = add 0x25fed40, 0x25ffb10 [ID=56]
0x25fed40: i32,ch = load 0x25fb450, 0x25fbd50, 0x25fb650<LD4[%32]> [ID=37]
0x25ffb10: i32 = sra 0x25fed40, 0x2607560 [ID=46]
0x25ffb10: i32 = sra 0x25fed40, 0x2607560 [ID=46]
0x25fed40: i32,ch = load 0x25fb450, 0x25fbd50, 0x25fb650<LD4[%32]> [ID=37]
0x2607560: i64 = Constant<31> [ID=23]
0x260dbc0: i32 = truncate 0x260dac0 [ID=85]
0x260dac0: i64 = srl 0x260d9c0, 0x25fb850 [ID=84]
0x260d9c0: i64 = mul 0x2607d70, 0x260d8c0 [ID=83]
0x2607d70: i64 = zero_extend 0x2607c70 [ID=82]
0x260d8c0: i64 = zero_extend 0x25ffc10 [ID=74]
0x25fb850: i64 = Constant<32> [ORD=3] [ID=4]
0x2607b70: i32 = sub 0x25ffc10, 0x260dbc0 [ID=87]
0x25ffc10: i32 = URECIP 0x2603590 [ID=70]
0x2603590: i32 = xor 0x2601770, 0x25ffb10 [ID=64]
0x2601770: i32 = add 0x25fed40, 0x25ffb10 [ID=56]
0x25fed40: i32,ch = load 0x25fb450, 0x25fbd50, 0x25fb650<LD4[%32]> [ID=37]
0x25ffb10: i32 = sra 0x25fed40, 0x2607560 [ID=46]
0x25ffb10: i32 = sra 0x25fed40, 0x2607560 [ID=46]
0x25fed40: i32,ch = load 0x25fb450, 0x25fbd50, 0x25fb650<LD4[%32]> [ID=37]
0x2607560: i64 = Constant<31> [ID=23]
0x260dbc0: i32 = truncate 0x260dac0 [ID=85]
0x260dac0: i64 = srl 0x260d9c0, 0x25fb850 [ID=84]
0x260d9c0: i64 = mul 0x2607d70, 0x260d8c0 [ID=83]
0x2607d70: i64 = zero_extend 0x2607c70 [ID=82]
0x260d8c0: i64 = zero_extend 0x25ffc10 [ID=74]
0x25fb850: i64 = Constant<32> [ORD=3] [ID=4]
0x260cdb0: i64 = zero_extend 0x2606960 [ID=71]
0x2606960: i32 = xor 0x2606860, 0x2604aa0 [ID=65]
0x2606860: i32 = add 0x25ff240, 0x2604aa0 [ID=58]
0x25ff240: i32,ch = load 0x25fb450, 0x25fe640, 0x25fb650<LD4[%10]> [ID=38]
0x25fe640: i64 = add 0x25fe940, 0x25fe540 [ORD=12] [ID=29]
0x25fe940: i64 = Register %vreg0 [ID=20]
0x25fe540: i64 = Constant<36> [ORD=12] [ID=6]
0x25fb650: i64 = undef [ORD=2] [ID=3]
0x2604aa0: i32 = sra 0x25ff240, 0x2607560 [ID=48]
0x25ff240: i32,ch = load 0x25fb450, 0x25fe640, 0x25fb650<LD4[%10]> [ID=38]
0x25fe640: i64 = add 0x25fe940, 0x25fe540 [ORD=12] [ID=29]
0x25fe940: i64 = Register %vreg0 [ID=20]
0x25fe540: i64 = Constant<36> [ORD=12] [ID=6]
0x25fb650: i64 = undef [ORD=2] [ID=3]
0x2607560: i64 = Constant<31> [ID=23]
0x2604aa0: i32 = sra 0x25ff240, 0x2607560 [ID=48]
0x25ff240: i32,ch = load 0x25fb450, 0x25fe640, 0x25fb650<LD4[%10]> [ID=38]
0x25fe640: i64 = add 0x25fe940, 0x25fe540 [ORD=12] [ID=29]
0x25fe940: i64 = Register %vreg0 [ID=20]
0x25fe540: i64 = Constant<36> [ORD=12] [ID=6]
0x25fb650: i64 = undef [ORD=2] [ID=3]
0x2607560: i64 = Constant<31> [ID=23]
0x25fb850: i64 = Constant<32> [ORD=3] [ID=4]
In function: main
Output:
|