Results for spec/glsl-1.10/execution/built-in-functions/fs-op-eq-ivec3-ivec3

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.0961618423462
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-eq-ivec3-ivec3.shader_test -auto
errors_ignored 
  • 0x1261700: i32,ch = load 0x125e2c0, 0x125e7c0, 0x125e4c0<LD4[%1]> [ID=26]
  • 0x1262f20: i64 = Register %vreg0 [ID=17]
  • 0x1261b00: i32,ch = load 0x125e2c0, 0x1262f20, 0x125e4c0<LD4[%5]> [ID=25]
  • 0x1262f20: i64 = Register %vreg0 [ID=17]
  • 0x1262100: i32,ch = load 0x125e2c0, 0x1261500, 0x125e4c0<LD4[%11]> [ID=27]
  • 0x1262820: i32,ch = load 0x125e2c0, 0x1261900, 0x125e4c0<LD4[%15]> [ID=28]
  • 0x1263020: i32,ch = load 0x125e2c0, 0x1261f00, 0x125e4c0<LD4[%21]> [ID=29]
  • 0x1263120: i32,ch = load 0x125e2c0, 0x1262620, 0x125e4c0<LD4[%25]> [ID=30]
errors 
  • LLVM ERROR: Cannot select: 0x1263b80: i32 = sign_extend 0x125eac0 [ID=43]
  • 0x125eac0: i1 = VCC_BITCAST 0x125e8c0 [ID=42]
  • 0x125e8c0: i64 = and 0x125e9c0, 0x125ebc0 [ID=41]
  • 0x125e9c0: i64 = VCC_BITCAST 0x125edc0 [ID=35]
  • 0x125edc0: i1 = setcc 0x1261700, 0x1261b00, 0x125ecc0 [ORD=10] [ID=31]
  • 0x125e7c0: i64 = add 0x1262f20, 0x125e6c0 [ORD=3] [ID=20]
  • 0x125e6c0: i64 = Constant<16> [ORD=3] [ID=4]
  • 0x125e4c0: i64 = undef [ORD=2] [ID=3]
  • 0x125e4c0: i64 = undef [ORD=2] [ID=3]
  • 0x125ebc0: i64 = VCC_BITCAST 0x1262000 [ID=40]
  • 0x1262000: i1 = VCC_BITCAST 0x1261a00 [ID=39]
  • 0x1261a00: i64 = and 0x1261600, 0x1262e20 [ID=38]
  • 0x1261600: i64 = VCC_BITCAST 0x1261c00 [ID=36]
  • 0x1261c00: i1 = setcc 0x1262100, 0x1262820, 0x125ecc0 [ORD=20] [ID=32]
  • 0x1261500: i64 = add 0x1262f20, 0x1261400 [ORD=13] [ID=21]
  • 0x125e4c0: i64 = undef [ORD=2] [ID=3]
  • 0x1261900: i64 = add 0x1262f20, 0x1261800 [ORD=17] [ID=22]
  • 0x125e4c0: i64 = undef [ORD=2] [ID=3]
  • 0x1262e20: i64 = VCC_BITCAST 0x1262920 [ID=37]
  • 0x1262920: i1 = setcc 0x1263020, 0x1263120, 0x125ecc0 [ORD=30] [ID=33]
  • 0x1261f00: i64 = add 0x1262f20, 0x1261e00 [ORD=23] [ID=23]
  • 0x125e4c0: i64 = undef [ORD=2] [ID=3]
  • 0x1262620: i64 = add 0x1262f20, 0x1262200 [ORD=27] [ID=24]
  • 0x125e4c0: i64 = undef [ORD=2] [ID=3]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x1263b80: i32 = sign_extend 0x125eac0 [ID=43]
  0x125eac0: i1 = VCC_BITCAST 0x125e8c0 [ID=42]
    0x125e8c0: i64 = and 0x125e9c0, 0x125ebc0 [ID=41]
      0x125e9c0: i64 = VCC_BITCAST 0x125edc0 [ID=35]
        0x125edc0: i1 = setcc 0x1261700, 0x1261b00, 0x125ecc0 [ORD=10] [ID=31]
          0x1261700: i32,ch = load 0x125e2c0, 0x125e7c0, 0x125e4c0<LD4[%1]> [ID=26]
            0x125e7c0: i64 = add 0x1262f20, 0x125e6c0 [ORD=3] [ID=20]
              0x1262f20: i64 = Register %vreg0 [ID=17]
              0x125e6c0: i64 = Constant<16> [ORD=3] [ID=4]
            0x125e4c0: i64 = undef [ORD=2] [ID=3]
          0x1261b00: i32,ch = load 0x125e2c0, 0x1262f20, 0x125e4c0<LD4[%5]> [ID=25]
            0x1262f20: i64 = Register %vreg0 [ID=17]
            0x125e4c0: i64 = undef [ORD=2] [ID=3]
      0x125ebc0: i64 = VCC_BITCAST 0x1262000 [ID=40]
        0x1262000: i1 = VCC_BITCAST 0x1261a00 [ID=39]
          0x1261a00: i64 = and 0x1261600, 0x1262e20 [ID=38]
            0x1261600: i64 = VCC_BITCAST 0x1261c00 [ID=36]
              0x1261c00: i1 = setcc 0x1262100, 0x1262820, 0x125ecc0 [ORD=20] [ID=32]
                0x1262100: i32,ch = load 0x125e2c0, 0x1261500, 0x125e4c0<LD4[%11]> [ID=27]
                  0x1261500: i64 = add 0x1262f20, 0x1261400 [ORD=13] [ID=21]


                  0x125e4c0: i64 = undef [ORD=2] [ID=3]
                0x1262820: i32,ch = load 0x125e2c0, 0x1261900, 0x125e4c0<LD4[%15]> [ID=28]
                  0x1261900: i64 = add 0x1262f20, 0x1261800 [ORD=17] [ID=22]


                  0x125e4c0: i64 = undef [ORD=2] [ID=3]
            0x1262e20: i64 = VCC_BITCAST 0x1262920 [ID=37]
              0x1262920: i1 = setcc 0x1263020, 0x1263120, 0x125ecc0 [ORD=30] [ID=33]
                0x1263020: i32,ch = load 0x125e2c0, 0x1261f00, 0x125e4c0<LD4[%21]> [ID=29]
                  0x1261f00: i64 = add 0x1262f20, 0x1261e00 [ORD=23] [ID=23]


                  0x125e4c0: i64 = undef [ORD=2] [ID=3]
                0x1263120: i32,ch = load 0x125e2c0, 0x1262620, 0x125e4c0<LD4[%25]> [ID=30]
                  0x1262620: i64 = add 0x1262f20, 0x1262200 [ORD=27] [ID=24]


                  0x125e4c0: i64 = undef [ORD=2] [ID=3]
In function: main


Output:

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