Results for spec/glsl-1.10/execution/built-in-functions/fs-op-ne-bvec3-bvec3

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.0764770507812
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-ne-bvec3-bvec3.shader_test -auto
errors_ignored 
  • 0x162ed40: i32,ch = load 0x162b8e0, 0x162bde0, 0x162bae0<LD4[%1]> [ID=26]
  • 0x162c1e0: i64 = Register %vreg0 [ID=17]
  • 0x162f140: i32,ch = load 0x162b8e0, 0x162c1e0, 0x162bae0<LD4[%5]> [ID=25]
  • 0x162c1e0: i64 = Register %vreg0 [ID=17]
  • 0x162f740: i32,ch = load 0x162b8e0, 0x162eb40, 0x162bae0<LD4[%11]> [ID=27]
  • 0x162c1e0: i64 = Register %vreg0 [ID=17]
  • 0x162fe60: i32,ch = load 0x162b8e0, 0x162ef40, 0x162bae0<LD4[%15]> [ID=28]
  • 0x162c1e0: i64 = Register %vreg0 [ID=17]
  • 0x1630660: i32,ch = load 0x162b8e0, 0x162f540, 0x162bae0<LD4[%21]> [ID=29]
  • 0x162c1e0: i64 = Register %vreg0 [ID=17]
  • 0x1630760: i32,ch = load 0x162b8e0, 0x162fc60, 0x162bae0<LD4[%25]> [ID=30]
  • 0x162c1e0: i64 = Register %vreg0 [ID=17]
errors 
  • LLVM ERROR: Cannot select: 0x16311c0: i32 = sign_extend 0x1630460 [ID=37]
  • 0x1630460: i1 = or 0x162c3e0, 0x1630560 [ID=36]
  • 0x162c3e0: i1 = setcc 0x162ed40, 0x162f140, 0x162c2e0 [ORD=10] [ID=31]
  • 0x162bde0: i64 = add 0x162c1e0, 0x162bce0 [ORD=3] [ID=20]
  • 0x162bce0: i64 = Constant<16> [ORD=3] [ID=4]
  • 0x162bae0: i64 = undef [ORD=2] [ID=3]
  • 0x162bae0: i64 = undef [ORD=2] [ID=3]
  • 0x1630560: i1 = or 0x162f240, 0x162ff60 [ID=35]
  • 0x162f240: i1 = setcc 0x162f740, 0x162fe60, 0x162c2e0 [ORD=20] [ID=32]
  • 0x162eb40: i64 = add 0x162c1e0, 0x162ea40 [ORD=13] [ID=21]
  • 0x162ea40: i64 = Constant<20> [ORD=13] [ID=6]
  • 0x162bae0: i64 = undef [ORD=2] [ID=3]
  • 0x162ef40: i64 = add 0x162c1e0, 0x162ee40 [ORD=17] [ID=22]
  • 0x162ee40: i64 = Constant<4> [ORD=17] [ID=7]
  • 0x162bae0: i64 = undef [ORD=2] [ID=3]
  • 0x162ff60: i1 = setcc 0x1630660, 0x1630760, 0x162c2e0 [ORD=30] [ID=33]
  • 0x162f540: i64 = add 0x162c1e0, 0x162f440 [ORD=23] [ID=23]
  • 0x162f440: i64 = Constant<24> [ORD=23] [ID=8]
  • 0x162bae0: i64 = undef [ORD=2] [ID=3]
  • 0x162fc60: i64 = add 0x162c1e0, 0x162f840 [ORD=27] [ID=24]
  • 0x162f840: i64 = Constant<8> [ORD=27] [ID=9]
  • 0x162bae0: i64 = undef [ORD=2] [ID=3]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x16311c0: i32 = sign_extend 0x1630460 [ID=37]
  0x1630460: i1 = or 0x162c3e0, 0x1630560 [ID=36]
    0x162c3e0: i1 = setcc 0x162ed40, 0x162f140, 0x162c2e0 [ORD=10] [ID=31]
      0x162ed40: i32,ch = load 0x162b8e0, 0x162bde0, 0x162bae0<LD4[%1]> [ID=26]
        0x162bde0: i64 = add 0x162c1e0, 0x162bce0 [ORD=3] [ID=20]
          0x162c1e0: i64 = Register %vreg0 [ID=17]
          0x162bce0: i64 = Constant<16> [ORD=3] [ID=4]
        0x162bae0: i64 = undef [ORD=2] [ID=3]
      0x162f140: i32,ch = load 0x162b8e0, 0x162c1e0, 0x162bae0<LD4[%5]> [ID=25]
        0x162c1e0: i64 = Register %vreg0 [ID=17]
        0x162bae0: i64 = undef [ORD=2] [ID=3]
    0x1630560: i1 = or 0x162f240, 0x162ff60 [ID=35]
      0x162f240: i1 = setcc 0x162f740, 0x162fe60, 0x162c2e0 [ORD=20] [ID=32]
        0x162f740: i32,ch = load 0x162b8e0, 0x162eb40, 0x162bae0<LD4[%11]> [ID=27]
          0x162eb40: i64 = add 0x162c1e0, 0x162ea40 [ORD=13] [ID=21]
            0x162c1e0: i64 = Register %vreg0 [ID=17]
            0x162ea40: i64 = Constant<20> [ORD=13] [ID=6]
          0x162bae0: i64 = undef [ORD=2] [ID=3]
        0x162fe60: i32,ch = load 0x162b8e0, 0x162ef40, 0x162bae0<LD4[%15]> [ID=28]
          0x162ef40: i64 = add 0x162c1e0, 0x162ee40 [ORD=17] [ID=22]
            0x162c1e0: i64 = Register %vreg0 [ID=17]
            0x162ee40: i64 = Constant<4> [ORD=17] [ID=7]
          0x162bae0: i64 = undef [ORD=2] [ID=3]
      0x162ff60: i1 = setcc 0x1630660, 0x1630760, 0x162c2e0 [ORD=30] [ID=33]
        0x1630660: i32,ch = load 0x162b8e0, 0x162f540, 0x162bae0<LD4[%21]> [ID=29]
          0x162f540: i64 = add 0x162c1e0, 0x162f440 [ORD=23] [ID=23]
            0x162c1e0: i64 = Register %vreg0 [ID=17]
            0x162f440: i64 = Constant<24> [ORD=23] [ID=8]
          0x162bae0: i64 = undef [ORD=2] [ID=3]
        0x1630760: i32,ch = load 0x162b8e0, 0x162fc60, 0x162bae0<LD4[%25]> [ID=30]
          0x162fc60: i64 = add 0x162c1e0, 0x162f840 [ORD=27] [ID=24]
            0x162c1e0: i64 = Register %vreg0 [ID=17]
            0x162f840: i64 = Constant<8> [ORD=27] [ID=9]
          0x162bae0: i64 = undef [ORD=2] [ID=3]
In function: main


Output:

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