Results for spec/glsl-1.10/execution/built-in-functions/fs-op-ne-ivec3-ivec3-using-if

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.16855096817
note
Returncode was 1
command
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-ne-ivec3-ivec3-using-if.shader_test -auto
errors_ignored
  • 0x1e2b6f0: i32,ch = load 0x1e28290, 0x1e28790, 0x1e28490<LD4[%1]> [ID=25]
  • 0x1e2d110: i64 = Register %vreg0 [ID=16]
  • 0x1e2baf0: i32,ch = load 0x1e28290, 0x1e2d110, 0x1e28490<LD4[%5]> [ID=24]
  • 0x1e2d110: i64 = Register %vreg0 [ID=16]
  • 0x1e2c0f0: i32,ch = load 0x1e28290, 0x1e2b4f0, 0x1e28490<LD4[%11]> [ID=26]
  • 0x1e2d110: i64 = Register %vreg0 [ID=16]
  • 0x1e2c810: i32,ch = load 0x1e28290, 0x1e2b8f0, 0x1e28490<LD4[%15]> [ID=27]
  • 0x1e2d110: i64 = Register %vreg0 [ID=16]
  • 0x1e2d210: i32,ch = load 0x1e28290, 0x1e2bef0, 0x1e28490<LD4[%21]> [ID=28]
  • 0x1e2d110: i64 = Register %vreg0 [ID=16]
  • 0x1e2dc20: i32,ch = load 0x1e28290, 0x1e2c610, 0x1e28490<LD4[%25]> [ID=29]
  • 0x1e2d110: i64 = Register %vreg0 [ID=16]
errors
  • LLVM ERROR: Cannot select: 0x1e2ce10: i1 = or 0x1e28d90, 0x1e2cf10 [ID=35]
  • 0x1e28d90: i1 = setcc 0x1e2b6f0, 0x1e2baf0, 0x1e28c90 [ORD=10] [ID=30]
  • 0x1e28790: i64 = add 0x1e2d110, 0x1e28690 [ORD=3] [ID=19]
  • 0x1e28690: i64 = Constant<16> [ORD=3] [ID=4]
  • 0x1e28490: i64 = undef [ORD=2] [ID=3]
  • 0x1e28490: i64 = undef [ORD=2] [ID=3]
  • 0x1e2cf10: i1 = or 0x1e2bbf0, 0x1e2c910 [ID=34]
  • 0x1e2bbf0: i1 = setcc 0x1e2c0f0, 0x1e2c810, 0x1e28c90 [ORD=20] [ID=31]
  • 0x1e2b4f0: i64 = add 0x1e2d110, 0x1e2b3f0 [ORD=13] [ID=20]
  • 0x1e2b3f0: i64 = Constant<20> [ORD=13] [ID=6]
  • 0x1e28490: i64 = undef [ORD=2] [ID=3]
  • 0x1e2b8f0: i64 = add 0x1e2d110, 0x1e2b7f0 [ORD=17] [ID=21]
  • 0x1e2b7f0: i64 = Constant<4> [ORD=17] [ID=7]
  • 0x1e28490: i64 = undef [ORD=2] [ID=3]
  • 0x1e2c910: i1 = setcc 0x1e2d210, 0x1e2dc20, 0x1e28c90 [ORD=30] [ID=32]
  • 0x1e2bef0: i64 = add 0x1e2d110, 0x1e2bdf0 [ORD=23] [ID=22]
  • 0x1e2bdf0: i64 = Constant<24> [ORD=23] [ID=8]
  • 0x1e28490: i64 = undef [ORD=2] [ID=3]
  • 0x1e2c610: i64 = add 0x1e2d110, 0x1e2c1f0 [ORD=27] [ID=23]
  • 0x1e2c1f0: i64 = Constant<8> [ORD=27] [ID=9]
  • 0x1e28490: i64 = undef [ORD=2] [ID=3]
  • In function: main
info
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x1e2ce10: i1 = or 0x1e28d90, 0x1e2cf10 [ID=35]
  0x1e28d90: i1 = setcc 0x1e2b6f0, 0x1e2baf0, 0x1e28c90 [ORD=10] [ID=30]
    0x1e2b6f0: i32,ch = load 0x1e28290, 0x1e28790, 0x1e28490<LD4[%1]> [ID=25]
      0x1e28790: i64 = add 0x1e2d110, 0x1e28690 [ORD=3] [ID=19]
        0x1e2d110: i64 = Register %vreg0 [ID=16]
        0x1e28690: i64 = Constant<16> [ORD=3] [ID=4]
      0x1e28490: i64 = undef [ORD=2] [ID=3]
    0x1e2baf0: i32,ch = load 0x1e28290, 0x1e2d110, 0x1e28490<LD4[%5]> [ID=24]
      0x1e2d110: i64 = Register %vreg0 [ID=16]
      0x1e28490: i64 = undef [ORD=2] [ID=3]
  0x1e2cf10: i1 = or 0x1e2bbf0, 0x1e2c910 [ID=34]
    0x1e2bbf0: i1 = setcc 0x1e2c0f0, 0x1e2c810, 0x1e28c90 [ORD=20] [ID=31]
      0x1e2c0f0: i32,ch = load 0x1e28290, 0x1e2b4f0, 0x1e28490<LD4[%11]> [ID=26]
        0x1e2b4f0: i64 = add 0x1e2d110, 0x1e2b3f0 [ORD=13] [ID=20]
          0x1e2d110: i64 = Register %vreg0 [ID=16]
          0x1e2b3f0: i64 = Constant<20> [ORD=13] [ID=6]
        0x1e28490: i64 = undef [ORD=2] [ID=3]
      0x1e2c810: i32,ch = load 0x1e28290, 0x1e2b8f0, 0x1e28490<LD4[%15]> [ID=27]
        0x1e2b8f0: i64 = add 0x1e2d110, 0x1e2b7f0 [ORD=17] [ID=21]
          0x1e2d110: i64 = Register %vreg0 [ID=16]
          0x1e2b7f0: i64 = Constant<4> [ORD=17] [ID=7]
        0x1e28490: i64 = undef [ORD=2] [ID=3]
    0x1e2c910: i1 = setcc 0x1e2d210, 0x1e2dc20, 0x1e28c90 [ORD=30] [ID=32]
      0x1e2d210: i32,ch = load 0x1e28290, 0x1e2bef0, 0x1e28490<LD4[%21]> [ID=28]
        0x1e2bef0: i64 = add 0x1e2d110, 0x1e2bdf0 [ORD=23] [ID=22]
          0x1e2d110: i64 = Register %vreg0 [ID=16]
          0x1e2bdf0: i64 = Constant<24> [ORD=23] [ID=8]
        0x1e28490: i64 = undef [ORD=2] [ID=3]
      0x1e2dc20: i32,ch = load 0x1e28290, 0x1e2c610, 0x1e28490<LD4[%25]> [ID=29]
        0x1e2c610: i64 = add 0x1e2d110, 0x1e2c1f0 [ORD=27] [ID=23]
          0x1e2d110: i64 = Register %vreg0 [ID=16]
          0x1e2c1f0: i64 = Constant<8> [ORD=27] [ID=9]
        0x1e28490: i64 = undef [ORD=2] [ID=3]
In function: main


Output:

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