Status: fail
Result: fail
Detail | Value |
---|---|
returncode | 1 |
time | 0.0696020126343 |
note | Returncode was 1 |
command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/fs-op-ne-ivec4-ivec4.shader_test -auto |
errors_ignored |
|
errors |
|
info | Returncode: 1 Errors: LLVM ERROR: Cannot select: 0x83fb30: i32 = sign_extend 0x83d800 [ID=45] 0x83d800: i1 = or 0x83d900, 0x83db00 [ID=44] 0x83d900: i1 = or 0x838ad0, 0x83b930 [ID=42] 0x838ad0: i1 = setcc 0x83b430, 0x83b830, 0x8389d0 [ORD=10] [ID=37] 0x83b430: i32,ch = load 0x837fd0, 0x8384d0, 0x8381d0<LD4[%1]> [ID=30] 0x8384d0: i64 = add 0x8388d0, 0x8383d0 [ORD=3] [ID=22] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x8383d0: i64 = Constant<16> [ORD=3] [ID=4] 0x8381d0: i64 = undef [ORD=2] [ID=3] 0x83b830: i32,ch = load 0x837fd0, 0x8388d0, 0x8381d0<LD4[%5]> [ID=29] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x8381d0: i64 = undef [ORD=2] [ID=3] 0x83b930: i1 = setcc 0x83be30, 0x83c550, 0x8389d0 [ORD=20] [ID=38] 0x83be30: i32,ch = load 0x837fd0, 0x83b230, 0x8381d0<LD4[%11]> [ID=31] 0x83b230: i64 = add 0x8388d0, 0x83b130 [ORD=13] [ID=23] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x83b130: i64 = Constant<20> [ORD=13] [ID=6] 0x8381d0: i64 = undef [ORD=2] [ID=3] 0x83c550: i32,ch = load 0x837fd0, 0x83b630, 0x8381d0<LD4[%15]> [ID=32] 0x83b630: i64 = add 0x8388d0, 0x83b530 [ORD=17] [ID=24] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x83b530: i64 = Constant<4> [ORD=17] [ID=7] 0x8381d0: i64 = undef [ORD=2] [ID=3] 0x83db00: i1 = or 0x83c650, 0x83d050 [ID=43] 0x83c650: i1 = setcc 0x83cb50, 0x83cf50, 0x8389d0 [ORD=30] [ID=39] 0x83cb50: i32,ch = load 0x837fd0, 0x83bc30, 0x8381d0<LD4[%21]> [ID=33] 0x83bc30: i64 = add 0x8388d0, 0x83bb30 [ORD=23] [ID=25] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x83bb30: i64 = Constant<24> [ORD=23] [ID=8] 0x8381d0: i64 = undef [ORD=2] [ID=3] 0x83cf50: i32,ch = load 0x837fd0, 0x83c350, 0x8381d0<LD4[%25]> [ID=34] 0x83c350: i64 = add 0x8388d0, 0x83bf30 [ORD=27] [ID=26] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x83bf30: i64 = Constant<8> [ORD=27] [ID=9] 0x8381d0: i64 = undef [ORD=2] [ID=3] 0x83d050: i1 = setcc 0x83dd00, 0x83da00, 0x8389d0 [ORD=40] [ID=40] 0x83dd00: i32,ch = load 0x837fd0, 0x83c950, 0x8381d0<LD4[%31]> [ID=35] 0x83c950: i64 = add 0x8388d0, 0x83c850 [ORD=33] [ID=27] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x83c850: i64 = Constant<28> [ORD=33] [ID=10] 0x8381d0: i64 = undef [ORD=2] [ID=3] 0x83da00: i32,ch = load 0x837fd0, 0x83cd50, 0x8381d0<LD4[%35]> [ID=36] 0x83cd50: i64 = add 0x8388d0, 0x83cc50 [ORD=37] [ID=28] 0x8388d0: i64 = Register %vreg0 [ID=19] 0x83cc50: i64 = Constant<12> [ORD=37] [ID=11] 0x8381d0: i64 = undef [ORD=2] [ID=3] In function: main Output: |