Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.0803158283234 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-div-int-int.shader_test -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
LLVM ERROR: Cannot select: 0x25665d0: i32 = truncate 0x25637a0 [ID=69]
0x25637a0: i64 = srl 0x25664d0, 0x2561380 [ID=68]
0x25664d0: i64 = mul 0x25659d0, 0x25662d0 [ID=67]
0x25659d0: i64 = zero_extend 0x25663d0 [ID=66]
0x25663d0: i32 = select 0x25651c0, 0x2564dc0, 0x2564ec0 [ID=65]
0x25651c0: i1 = setcc 0x25671f0, 0x253ca70, 0x2562090 [ID=57]
0x25671f0: i32 = truncate 0x25670f0 [ID=56]
0x25670f0: i64 = srl 0x2566ff0, 0x2561380 [ID=55]
0x2566ff0: i64 = mul 0x25666d0, 0x2564cc0 [ID=53]
0x25666d0: i64 = zero_extend 0x2560c80 [ID=51]
0x2564cc0: i64 = zero_extend 0x2561a90 [ID=49]
0x2561380: i64 = Constant<32> [ORD=13] [ID=10]
0x253ca70: i32 = Constant<0> [ORD=7] [ID=6]
0x2564dc0: i32 = add 0x2560c80, 0x2566ef0 [ID=63]
0x2560c80: i32 = URECIP 0x2561a90 [ID=50]
0x2561a90: i32 = xor 0x2561680, 0x2560f80 [ID=47]
0x2561680: i32 = add 0x2561d90, 0x2560f80 [ID=45]
0x2561d90: i32,ch = load 0x253cb70:1, 0x2561990, 0x253c370<LD4[%14]> [ID=33]
0x2560f80: i32 = sra 0x2561d90, 0x25649c0 [ID=41]
0x2560f80: i32 = sra 0x2561d90, 0x25649c0 [ID=41]
0x2561d90: i32,ch = load 0x253cb70:1, 0x2561990, 0x253c370<LD4[%14]> [ID=33]
0x25649c0: i64 = Constant<31> [ID=25]
0x2566ef0: i32 = truncate 0x2566df0 [ID=62]
0x2566df0: i64 = srl 0x25667d0, 0x2561380 [ID=61]
0x25667d0: i64 = mul 0x25650c0, 0x25666d0 [ID=60]
0x25650c0: i64 = zero_extend 0x2564fc0 [ID=59]
0x25666d0: i64 = zero_extend 0x2560c80 [ID=51]
0x2561380: i64 = Constant<32> [ORD=13] [ID=10]
0x2564ec0: i32 = sub 0x2560c80, 0x2566ef0 [ID=64]
0x2560c80: i32 = URECIP 0x2561a90 [ID=50]
0x2561a90: i32 = xor 0x2561680, 0x2560f80 [ID=47]
0x2561680: i32 = add 0x2561d90, 0x2560f80 [ID=45]
0x2561d90: i32,ch = load 0x253cb70:1, 0x2561990, 0x253c370<LD4[%14]> [ID=33]
0x2560f80: i32 = sra 0x2561d90, 0x25649c0 [ID=41]
0x2560f80: i32 = sra 0x2561d90, 0x25649c0 [ID=41]
0x2561d90: i32,ch = load 0x253cb70:1, 0x2561990, 0x253c370<LD4[%14]> [ID=33]
0x25649c0: i64 = Constant<31> [ID=25]
0x2566ef0: i32 = truncate 0x2566df0 [ID=62]
0x2566df0: i64 = srl 0x25667d0, 0x2561380 [ID=61]
0x25667d0: i64 = mul 0x25650c0, 0x25666d0 [ID=60]
0x25650c0: i64 = zero_extend 0x2564fc0 [ID=59]
0x25666d0: i64 = zero_extend 0x2560c80 [ID=51]
0x2561380: i64 = Constant<32> [ORD=13] [ID=10]
0x25662d0: i64 = zero_extend 0x2561580 [ID=48]
0x2561580: i32 = xor 0x2561b90, 0x25672f0 [ID=46]
0x2561b90: i32 = add 0x2562590, 0x25672f0 [ID=43]
0x2562590: i32,ch = load 0x253cb70:1, 0x2561480, 0x253c370<LD4[%10]> [ID=32]
0x2561480: i64 = add 0x2561c90, 0x2561380 [ORD=13] [ID=27]
0x2561c90: i64 = Register %vreg0 [ID=20]
0x2561380: i64 = Constant<32> [ORD=13] [ID=10]
0x253c370: i64 = undef [ORD=3] [ID=4]
0x25672f0: i32 = sra 0x2562590, 0x25649c0 [ID=39]
0x2562590: i32,ch = load 0x253cb70:1, 0x2561480, 0x253c370<LD4[%10]> [ID=32]
0x2561480: i64 = add 0x2561c90, 0x2561380 [ORD=13] [ID=27]
0x2561c90: i64 = Register %vreg0 [ID=20]
0x2561380: i64 = Constant<32> [ORD=13] [ID=10]
0x253c370: i64 = undef [ORD=3] [ID=4]
0x25649c0: i64 = Constant<31> [ID=25]
0x25672f0: i32 = sra 0x2562590, 0x25649c0 [ID=39]
0x2562590: i32,ch = load 0x253cb70:1, 0x2561480, 0x253c370<LD4[%10]> [ID=32]
0x2561480: i64 = add 0x2561c90, 0x2561380 [ORD=13] [ID=27]
0x2561c90: i64 = Register %vreg0 [ID=20]
0x2561380: i64 = Constant<32> [ORD=13] [ID=10]
0x253c370: i64 = undef [ORD=3] [ID=4]
0x25649c0: i64 = Constant<31> [ID=25]
0x2561380: i64 = Constant<32> [ORD=13] [ID=10]
In function: main
Output:
|