Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.084755897522 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-div-int-ivec2.shader_test -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
LLVM ERROR: Cannot select: 0x1c91000: i32 = truncate 0x1c90f00 [ID=101]
0x1c90f00: i64 = srl 0x1c90e00, 0x1c86860 [ID=99]
0x1c90e00: i64 = mul 0x1c8ced0, 0x1c8f9e0 [ID=97]
0x1c8ced0: i64 = zero_extend 0x1c8fde0 [ID=95]
0x1c8fde0: i32 = select 0x1c8c6c0, 0x1c8c2c0, 0x1c8c3c0 [ID=93]
0x1c8c6c0: i1 = setcc 0x1c91700, 0x1c83720, 0x1c87d00 [ID=77]
0x1c91700: i32 = truncate 0x1c91600 [ID=75]
0x1c91600: i64 = srl 0x1c91500, 0x1c86860 [ID=73]
0x1c91500: i64 = mul 0x1c91100, 0x1c8c1c0 [ID=70]
0x1c91100: i64 = zero_extend 0x1c86b60 [ID=66]
0x1c8c1c0: i64 = zero_extend 0x1c87c00 [ID=62]
0x1c86860: i64 = Constant<32> [ORD=13] [ID=10]
0x1c83720: i32 = Constant<0> [ORD=7] [ID=6]
0x1c8c2c0: i32 = add 0x1c86b60, 0x1c91400 [ID=90]
0x1c86b60: i32 = URECIP 0x1c87c00 [ID=63]
0x1c87c00: i32 = xor 0x1c87600, 0x1c86a60 [ID=58]
0x1c87600: i32 = add 0x1c87900, 0x1c86a60 [ID=55]
0x1c87900: i32,ch = load 0x1c83820:1, 0x1c87500, 0x1c83020<LD4[%23]> [ID=38]
0x1c86a60: i32 = sra 0x1c87900, 0x1c8bec0 [ID=49]
0x1c86a60: i32 = sra 0x1c87900, 0x1c8bec0 [ID=49]
0x1c87900: i32,ch = load 0x1c83820:1, 0x1c87500, 0x1c83020<LD4[%23]> [ID=38]
0x1c8bec0: i64 = Constant<31> [ID=27]
0x1c91400: i32 = truncate 0x1c91300 [ID=87]
0x1c91300: i64 = srl 0x1c91200, 0x1c86860 [ID=85]
0x1c91200: i64 = mul 0x1c8c5c0, 0x1c91100 [ID=83]
0x1c8c5c0: i64 = zero_extend 0x1c8c4c0 [ID=81]
0x1c91100: i64 = zero_extend 0x1c86b60 [ID=66]
0x1c86860: i64 = Constant<32> [ORD=13] [ID=10]
0x1c8c3c0: i32 = sub 0x1c86b60, 0x1c91400 [ID=91]
0x1c86b60: i32 = URECIP 0x1c87c00 [ID=63]
0x1c87c00: i32 = xor 0x1c87600, 0x1c86a60 [ID=58]
0x1c87600: i32 = add 0x1c87900, 0x1c86a60 [ID=55]
0x1c87900: i32,ch = load 0x1c83820:1, 0x1c87500, 0x1c83020<LD4[%23]> [ID=38]
0x1c86a60: i32 = sra 0x1c87900, 0x1c8bec0 [ID=49]
0x1c86a60: i32 = sra 0x1c87900, 0x1c8bec0 [ID=49]
0x1c87900: i32,ch = load 0x1c83820:1, 0x1c87500, 0x1c83020<LD4[%23]> [ID=38]
0x1c8bec0: i64 = Constant<31> [ID=27]
0x1c91400: i32 = truncate 0x1c91300 [ID=87]
0x1c91300: i64 = srl 0x1c91200, 0x1c86860 [ID=85]
0x1c91200: i64 = mul 0x1c8c5c0, 0x1c91100 [ID=83]
0x1c8c5c0: i64 = zero_extend 0x1c8c4c0 [ID=81]
0x1c91100: i64 = zero_extend 0x1c86b60 [ID=66]
0x1c86860: i64 = Constant<32> [ORD=13] [ID=10]
0x1c8f9e0: i64 = zero_extend 0x1c88620 [ID=59]
0x1c88620: i32 = xor 0x1c87100, 0x1c91800 [ID=56]
0x1c87100: i32 = add 0x1c87700, 0x1c91800 [ID=51]
0x1c87700: i32,ch = load 0x1c83820:1, 0x1c86960, 0x1c83020<LD4[%19]> [ID=36]
0x1c86960: i64 = add 0x1c87300, 0x1c86860 [ORD=13] [ID=29]
0x1c87300: i64 = Register %vreg0 [ID=22]
0x1c86860: i64 = Constant<32> [ORD=13] [ID=10]
0x1c83020: i64 = undef [ORD=3] [ID=4]
0x1c91800: i32 = sra 0x1c87700, 0x1c8bec0 [ID=45]
0x1c87700: i32,ch = load 0x1c83820:1, 0x1c86960, 0x1c83020<LD4[%19]> [ID=36]
0x1c86960: i64 = add 0x1c87300, 0x1c86860 [ORD=13] [ID=29]
0x1c87300: i64 = Register %vreg0 [ID=22]
0x1c86860: i64 = Constant<32> [ORD=13] [ID=10]
0x1c83020: i64 = undef [ORD=3] [ID=4]
0x1c8bec0: i64 = Constant<31> [ID=27]
0x1c91800: i32 = sra 0x1c87700, 0x1c8bec0 [ID=45]
0x1c87700: i32,ch = load 0x1c83820:1, 0x1c86960, 0x1c83020<LD4[%19]> [ID=36]
0x1c86960: i64 = add 0x1c87300, 0x1c86860 [ORD=13] [ID=29]
0x1c87300: i64 = Register %vreg0 [ID=22]
0x1c86860: i64 = Constant<32> [ORD=13] [ID=10]
0x1c83020: i64 = undef [ORD=3] [ID=4]
0x1c8bec0: i64 = Constant<31> [ID=27]
0x1c86860: i64 = Constant<32> [ORD=13] [ID=10]
In function: main
Output:
|