Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.101395845413 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-div-ivec2-int.shader_test -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
LLVM ERROR: Cannot select: 0x10a0e00: i32 = truncate 0x10a0af0 [ID=84]
0x10a0af0: i64 = srl 0x109f500, 0x1098780 [ID=82]
0x109f500: i64 = mul 0x10a00f0, 0x10a09f0 [ID=80]
0x10a00f0: i64 = zero_extend 0x10a0bf0 [ID=78]
0x10a0bf0: i32 = select 0x109e4f0, 0x109e0f0, 0x109e1f0 [ID=77]
0x109e4f0: i1 = setcc 0x10a1700, 0x1072b60, 0x1099b30 [ID=69]
0x10a1700: i32 = truncate 0x10a1600 [ID=68]
0x10a1600: i64 = srl 0x10a1500, 0x1098780 [ID=67]
0x10a1500: i64 = mul 0x10a1100, 0x109dff0 [ID=65]
0x10a1100: i64 = zero_extend 0x1098a80 [ID=63]
0x109dff0: i64 = zero_extend 0x1099a30 [ID=60]
0x1098780: i64 = Constant<32> [ORD=13] [ID=10]
0x1072b60: i32 = Constant<0> [ORD=7] [ID=6]
0x109e0f0: i32 = add 0x1098a80, 0x10a1400 [ID=75]
0x1098a80: i32 = URECIP 0x1099a30 [ID=61]
0x1099a30: i32 = xor 0x1099430, 0x1098980 [ID=57]
0x1099430: i32 = add 0x1099830, 0x1098980 [ID=53]
0x1099830: i32,ch = load 0x1072c60:1, 0x1098e30, 0x1072460<LD4[%23]> [ID=37]
0x1098980: i32 = sra 0x1099830, 0x109dcf0 [ID=47]
0x1098980: i32 = sra 0x1099830, 0x109dcf0 [ID=47]
0x1099830: i32,ch = load 0x1072c60:1, 0x1098e30, 0x1072460<LD4[%23]> [ID=37]
0x109dcf0: i64 = Constant<31> [ID=27]
0x10a1400: i32 = truncate 0x10a1300 [ID=74]
0x10a1300: i64 = srl 0x10a1200, 0x1098780 [ID=73]
0x10a1200: i64 = mul 0x109e3f0, 0x10a1100 [ID=72]
0x109e3f0: i64 = zero_extend 0x109e2f0 [ID=71]
0x10a1100: i64 = zero_extend 0x1098a80 [ID=63]
0x1098780: i64 = Constant<32> [ORD=13] [ID=10]
0x109e1f0: i32 = sub 0x1098a80, 0x10a1400 [ID=76]
0x1098a80: i32 = URECIP 0x1099a30 [ID=61]
0x1099a30: i32 = xor 0x1099430, 0x1098980 [ID=57]
0x1099430: i32 = add 0x1099830, 0x1098980 [ID=53]
0x1099830: i32,ch = load 0x1072c60:1, 0x1098e30, 0x1072460<LD4[%23]> [ID=37]
0x1098980: i32 = sra 0x1099830, 0x109dcf0 [ID=47]
0x1098980: i32 = sra 0x1099830, 0x109dcf0 [ID=47]
0x1099830: i32,ch = load 0x1072c60:1, 0x1098e30, 0x1072460<LD4[%23]> [ID=37]
0x109dcf0: i64 = Constant<31> [ID=27]
0x10a1400: i32 = truncate 0x10a1300 [ID=74]
0x10a1300: i64 = srl 0x10a1200, 0x1098780 [ID=73]
0x10a1200: i64 = mul 0x109e3f0, 0x10a1100 [ID=72]
0x109e3f0: i64 = zero_extend 0x109e2f0 [ID=71]
0x10a1100: i64 = zero_extend 0x1098a80 [ID=63]
0x1098780: i64 = Constant<32> [ORD=13] [ID=10]
0x10a09f0: i64 = zero_extend 0x109a050 [ID=62]
0x109a050: i32 = xor 0x109a750, 0x109a350 [ID=58]
0x109a750: i32 = add 0x1099730, 0x109a350 [ID=55]
0x1099730: i32,ch = load 0x1072c60:1, 0x1099330, 0x1072460<LD4[%19]> [ID=38]
0x1099330: i64 = add 0x1099630, 0x1099230 [ORD=22] [ID=31]
0x1099630: i64 = Register %vreg0 [ID=22]
0x1099230: i64 = Constant<36> [ORD=22] [ID=12]
0x1072460: i64 = undef [ORD=3] [ID=4]
0x109a350: i32 = sra 0x1099730, 0x109dcf0 [ID=49]
0x1099730: i32,ch = load 0x1072c60:1, 0x1099330, 0x1072460<LD4[%19]> [ID=38]
0x1099330: i64 = add 0x1099630, 0x1099230 [ORD=22] [ID=31]
0x1099630: i64 = Register %vreg0 [ID=22]
0x1099230: i64 = Constant<36> [ORD=22] [ID=12]
0x1072460: i64 = undef [ORD=3] [ID=4]
0x109dcf0: i64 = Constant<31> [ID=27]
0x109a350: i32 = sra 0x1099730, 0x109dcf0 [ID=49]
0x1099730: i32,ch = load 0x1072c60:1, 0x1099330, 0x1072460<LD4[%19]> [ID=38]
0x1099330: i64 = add 0x1099630, 0x1099230 [ORD=22] [ID=31]
0x1099630: i64 = Register %vreg0 [ID=22]
0x1099230: i64 = Constant<36> [ORD=22] [ID=12]
0x1072460: i64 = undef [ORD=3] [ID=4]
0x109dcf0: i64 = Constant<31> [ID=27]
0x1098780: i64 = Constant<32> [ORD=13] [ID=10]
In function: main
Output:
|