Status: fail
Result: fail
| Detail | Value |
|---|---|
| returncode | 1 |
| time | 0.101649999619 |
| note | Returncode was 1 |
| command | /home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-div-ivec2-ivec2.shader_test -auto |
| errors_ignored |
|
| errors |
|
| info | Returncode: 1
Errors:
LLVM ERROR: Cannot select: 0x1f0b7b0: i32 = truncate 0x1f09000 [ID=108]
0x1f09000: i64 = srl 0x1f0b6b0, 0x1f015c0 [ID=106]
0x1f0b6b0: i64 = mul 0x1f0a1b0, 0x1f0aab0 [ID=104]
0x1f0a1b0: i64 = zero_extend 0x1f0abb0 [ID=102]
0x1f0abb0: i32 = select 0x1f09900, 0x1f09500, 0x1f09600 [ID=100]
0x1f09900: i1 = setcc 0x1f0beb0, 0x1efe480, 0x1f030e0 [ID=84]
0x1f0beb0: i32 = truncate 0x1f0bdb0 [ID=82]
0x1f0bdb0: i64 = srl 0x1f0bcb0, 0x1f015c0 [ID=80]
0x1f0bcb0: i64 = mul 0x1f0b9b0, 0x1f09400 [ID=77]
0x1f0b9b0: i64 = zero_extend 0x1f02010 [ID=73]
0x1f09400: i64 = zero_extend 0x1f038e0 [ID=69]
0x1f015c0: i64 = Constant<32> [ORD=13] [ID=10]
0x1efe480: i32 = Constant<0> [ORD=7] [ID=6]
0x1f09500: i32 = add 0x1f02010, 0x1f0bbb0 [ID=97]
0x1f02010: i32 = URECIP 0x1f038e0 [ID=70]
0x1f038e0: i32 = xor 0x1f032e0, 0x1f06be0 [ID=64]
0x1f032e0: i32 = add 0x1f02a10, 0x1f06be0 [ID=60]
0x1f02a10: i32,ch = load 0x1efe580:1, 0x1f02610, 0x1efdd80<LD4[%23]> [ID=41]
0x1f06be0: i32 = sra 0x1f02a10, 0x1f076e0 [ID=53]
0x1f06be0: i32 = sra 0x1f02a10, 0x1f076e0 [ID=53]
0x1f02a10: i32,ch = load 0x1efe580:1, 0x1f02610, 0x1efdd80<LD4[%23]> [ID=41]
0x1f076e0: i64 = Constant<31> [ID=28]
0x1f0bbb0: i32 = truncate 0x1f0bab0 [ID=94]
0x1f0bab0: i64 = srl 0x1f075e0, 0x1f015c0 [ID=92]
0x1f075e0: i64 = mul 0x1f09800, 0x1f0b9b0 [ID=90]
0x1f09800: i64 = zero_extend 0x1f09700 [ID=88]
0x1f0b9b0: i64 = zero_extend 0x1f02010 [ID=73]
0x1f015c0: i64 = Constant<32> [ORD=13] [ID=10]
0x1f09600: i32 = sub 0x1f02010, 0x1f0bbb0 [ID=98]
0x1f02010: i32 = URECIP 0x1f038e0 [ID=70]
0x1f038e0: i32 = xor 0x1f032e0, 0x1f06be0 [ID=64]
0x1f032e0: i32 = add 0x1f02a10, 0x1f06be0 [ID=60]
0x1f02a10: i32,ch = load 0x1efe580:1, 0x1f02610, 0x1efdd80<LD4[%23]> [ID=41]
0x1f06be0: i32 = sra 0x1f02a10, 0x1f076e0 [ID=53]
0x1f06be0: i32 = sra 0x1f02a10, 0x1f076e0 [ID=53]
0x1f02a10: i32,ch = load 0x1efe580:1, 0x1f02610, 0x1efdd80<LD4[%23]> [ID=41]
0x1f076e0: i64 = Constant<31> [ID=28]
0x1f0bbb0: i32 = truncate 0x1f0bab0 [ID=94]
0x1f0bab0: i64 = srl 0x1f075e0, 0x1f015c0 [ID=92]
0x1f075e0: i64 = mul 0x1f09800, 0x1f0b9b0 [ID=90]
0x1f09800: i64 = zero_extend 0x1f09700 [ID=88]
0x1f0b9b0: i64 = zero_extend 0x1f02010 [ID=73]
0x1f015c0: i64 = Constant<32> [ORD=13] [ID=10]
0x1f0aab0: i64 = zero_extend 0x1f03ae0 [ID=68]
0x1f03ae0: i32 = xor 0x1f039e0, 0x1f02ee0 [ID=63]
0x1f039e0: i32 = add 0x1f02b10, 0x1f02ee0 [ID=58]
0x1f02b10: i32,ch = load 0x1efe580:1, 0x1f02210, 0x1efdd80<LD4[%19]> [ID=40]
0x1f02210: i64 = add 0x1f02910, 0x1f02110 [ORD=22] [ID=32]
0x1f02910: i64 = Register %vreg0 [ID=23]
0x1f02110: i64 = Constant<36> [ORD=22] [ID=12]
0x1efdd80: i64 = undef [ORD=3] [ID=4]
0x1f02ee0: i32 = sra 0x1f02b10, 0x1f076e0 [ID=51]
0x1f02b10: i32,ch = load 0x1efe580:1, 0x1f02210, 0x1efdd80<LD4[%19]> [ID=40]
0x1f02210: i64 = add 0x1f02910, 0x1f02110 [ORD=22] [ID=32]
0x1f02910: i64 = Register %vreg0 [ID=23]
0x1f02110: i64 = Constant<36> [ORD=22] [ID=12]
0x1efdd80: i64 = undef [ORD=3] [ID=4]
0x1f076e0: i64 = Constant<31> [ID=28]
0x1f02ee0: i32 = sra 0x1f02b10, 0x1f076e0 [ID=51]
0x1f02b10: i32,ch = load 0x1efe580:1, 0x1f02210, 0x1efdd80<LD4[%19]> [ID=40]
0x1f02210: i64 = add 0x1f02910, 0x1f02110 [ORD=22] [ID=32]
0x1f02910: i64 = Register %vreg0 [ID=23]
0x1f02110: i64 = Constant<36> [ORD=22] [ID=12]
0x1efdd80: i64 = undef [ORD=3] [ID=4]
0x1f076e0: i64 = Constant<31> [ID=28]
0x1f015c0: i64 = Constant<32> [ORD=13] [ID=10]
In function: main
Output:
|