Results for spec/glsl-1.10/execution/built-in-functions/vs-op-eq-ivec2-ivec2

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.0730001926422
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-eq-ivec2-ivec2.shader_test -auto
errors_ignored 
  • 0x9bc7a0: i32,ch = load 0x9b2380:1, 0x9bbb90, 0x9b1b80<LD4[%10]> [ID=30]
  • 0x9bd3a0: i64 = Register %vreg0 [ID=20]
  • 0x9bcba0: i32,ch = load 0x9b2380:1, 0x9bd3a0, 0x9b1b80<LD4[%14]> [ID=31]
  • 0x9bd3a0: i64 = Register %vreg0 [ID=20]
  • 0x9bf6d0: i32,ch = load 0x9b2380:1, 0x9bc5a0, 0x9b1b80<LD4[%20]> [ID=32]
  • 0x9bd3a0: i64 = Register %vreg0 [ID=20]
  • 0x9bd2a0: i32,ch = load 0x9b2380:1, 0x9bc9a0, 0x9b1b80<LD4[%24]> [ID=33]
  • 0x9bd3a0: i64 = Register %vreg0 [ID=20]
errors 
  • LLVM ERROR: Cannot select: 0x9bd7a0: i32 = sign_extend 0x9bc0a0 [ID=45]
  • 0x9bc0a0: i1 = VCC_BITCAST 0x9bb690 [ID=44]
  • 0x9bb690: i64 = and 0x9bb390, 0x9b1880 [ID=43]
  • 0x9bb390: i64 = VCC_BITCAST 0x9bc2a0 [ID=41]
  • 0x9bc2a0: i1 = setcc 0x9bc7a0, 0x9bcba0, 0x9bc1a0 [ORD=20] [ID=38]
  • 0x9bbb90: i64 = add 0x9bd3a0, 0x9bba90 [ORD=13] [ID=24]
  • 0x9bba90: i64 = Constant<16> [ORD=13] [ID=10]
  • 0x9b1b80: i64 = undef [ORD=3] [ID=4]
  • 0x9b1b80: i64 = undef [ORD=3] [ID=4]
  • 0x9b1880: i64 = VCC_BITCAST 0x9bcca0 [ID=42]
  • 0x9bcca0: i1 = setcc 0x9bf6d0, 0x9bd2a0, 0x9bc1a0 [ORD=30] [ID=39]
  • 0x9bc5a0: i64 = add 0x9bd3a0, 0x9bc4a0 [ORD=23] [ID=25]
  • 0x9bc4a0: i64 = Constant<20> [ORD=23] [ID=12]
  • 0x9b1b80: i64 = undef [ORD=3] [ID=4]
  • 0x9bc9a0: i64 = add 0x9bd3a0, 0x9bc8a0 [ORD=27] [ID=26]
  • 0x9bc8a0: i64 = Constant<4> [ORD=27] [ID=13]
  • 0x9b1b80: i64 = undef [ORD=3] [ID=4]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x9bd7a0: i32 = sign_extend 0x9bc0a0 [ID=45]
  0x9bc0a0: i1 = VCC_BITCAST 0x9bb690 [ID=44]
    0x9bb690: i64 = and 0x9bb390, 0x9b1880 [ID=43]
      0x9bb390: i64 = VCC_BITCAST 0x9bc2a0 [ID=41]
        0x9bc2a0: i1 = setcc 0x9bc7a0, 0x9bcba0, 0x9bc1a0 [ORD=20] [ID=38]
          0x9bc7a0: i32,ch = load 0x9b2380:1, 0x9bbb90, 0x9b1b80<LD4[%10]> [ID=30]
            0x9bbb90: i64 = add 0x9bd3a0, 0x9bba90 [ORD=13] [ID=24]
              0x9bd3a0: i64 = Register %vreg0 [ID=20]
              0x9bba90: i64 = Constant<16> [ORD=13] [ID=10]
            0x9b1b80: i64 = undef [ORD=3] [ID=4]
          0x9bcba0: i32,ch = load 0x9b2380:1, 0x9bd3a0, 0x9b1b80<LD4[%14]> [ID=31]
            0x9bd3a0: i64 = Register %vreg0 [ID=20]
            0x9b1b80: i64 = undef [ORD=3] [ID=4]
      0x9b1880: i64 = VCC_BITCAST 0x9bcca0 [ID=42]
        0x9bcca0: i1 = setcc 0x9bf6d0, 0x9bd2a0, 0x9bc1a0 [ORD=30] [ID=39]
          0x9bf6d0: i32,ch = load 0x9b2380:1, 0x9bc5a0, 0x9b1b80<LD4[%20]> [ID=32]
            0x9bc5a0: i64 = add 0x9bd3a0, 0x9bc4a0 [ORD=23] [ID=25]
              0x9bd3a0: i64 = Register %vreg0 [ID=20]
              0x9bc4a0: i64 = Constant<20> [ORD=23] [ID=12]
            0x9b1b80: i64 = undef [ORD=3] [ID=4]
          0x9bd2a0: i32,ch = load 0x9b2380:1, 0x9bc9a0, 0x9b1b80<LD4[%24]> [ID=33]
            0x9bc9a0: i64 = add 0x9bd3a0, 0x9bc8a0 [ORD=27] [ID=26]
              0x9bd3a0: i64 = Register %vreg0 [ID=20]
              0x9bc8a0: i64 = Constant<4> [ORD=27] [ID=13]
            0x9b1b80: i64 = undef [ORD=3] [ID=4]
In function: main


Output:

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