Results for spec/glsl-1.10/execution/built-in-functions/vs-op-ne-bvec2-bvec2

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.0893051624298
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-ne-bvec2-bvec2.shader_test -auto
errors_ignored 
  • 0xddd9e0: i32,ch = load 0xdd9bd0:1, 0xddcce0, 0xdd93d0<LD4[%10]> [ID=30]
  • 0xdd90d0: i64 = Register %vreg0 [ID=20]
  • 0xdddde0: i32,ch = load 0xdd9bd0:1, 0xdd90d0, 0xdd93d0<LD4[%14]> [ID=31]
  • 0xdd90d0: i64 = Register %vreg0 [ID=20]
  • 0xde0980: i32,ch = load 0xdd9bd0:1, 0xddd7e0, 0xdd93d0<LD4[%20]> [ID=32]
  • 0xdd90d0: i64 = Register %vreg0 [ID=20]
  • 0xdde550: i32,ch = load 0xdd9bd0:1, 0xdddbe0, 0xdd93d0<LD4[%24]> [ID=33]
  • 0xdd90d0: i64 = Register %vreg0 [ID=20]
errors 
  • LLVM ERROR: Cannot select: 0xddea50: i32 = sign_extend 0xdde650 [ID=42]
  • 0xdde650: i1 = or 0xddd4e0, 0xdddee0 [ID=41]
  • 0xddd4e0: i1 = setcc 0xddd9e0, 0xdddde0, 0xddd3e0 [ORD=20] [ID=38]
  • 0xddcce0: i64 = add 0xdd90d0, 0xddcbe0 [ORD=13] [ID=24]
  • 0xddcbe0: i64 = Constant<16> [ORD=13] [ID=10]
  • 0xdd93d0: i64 = undef [ORD=3] [ID=4]
  • 0xdd93d0: i64 = undef [ORD=3] [ID=4]
  • 0xdddee0: i1 = setcc 0xde0980, 0xdde550, 0xddd3e0 [ORD=30] [ID=39]
  • 0xddd7e0: i64 = add 0xdd90d0, 0xddd6e0 [ORD=23] [ID=25]
  • 0xddd6e0: i64 = Constant<20> [ORD=23] [ID=12]
  • 0xdd93d0: i64 = undef [ORD=3] [ID=4]
  • 0xdddbe0: i64 = add 0xdd90d0, 0xdddae0 [ORD=27] [ID=26]
  • 0xdddae0: i64 = Constant<4> [ORD=27] [ID=13]
  • 0xdd93d0: i64 = undef [ORD=3] [ID=4]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0xddea50: i32 = sign_extend 0xdde650 [ID=42]
  0xdde650: i1 = or 0xddd4e0, 0xdddee0 [ID=41]
    0xddd4e0: i1 = setcc 0xddd9e0, 0xdddde0, 0xddd3e0 [ORD=20] [ID=38]
      0xddd9e0: i32,ch = load 0xdd9bd0:1, 0xddcce0, 0xdd93d0<LD4[%10]> [ID=30]
        0xddcce0: i64 = add 0xdd90d0, 0xddcbe0 [ORD=13] [ID=24]
          0xdd90d0: i64 = Register %vreg0 [ID=20]
          0xddcbe0: i64 = Constant<16> [ORD=13] [ID=10]
        0xdd93d0: i64 = undef [ORD=3] [ID=4]
      0xdddde0: i32,ch = load 0xdd9bd0:1, 0xdd90d0, 0xdd93d0<LD4[%14]> [ID=31]
        0xdd90d0: i64 = Register %vreg0 [ID=20]
        0xdd93d0: i64 = undef [ORD=3] [ID=4]
    0xdddee0: i1 = setcc 0xde0980, 0xdde550, 0xddd3e0 [ORD=30] [ID=39]
      0xde0980: i32,ch = load 0xdd9bd0:1, 0xddd7e0, 0xdd93d0<LD4[%20]> [ID=32]
        0xddd7e0: i64 = add 0xdd90d0, 0xddd6e0 [ORD=23] [ID=25]
          0xdd90d0: i64 = Register %vreg0 [ID=20]
          0xddd6e0: i64 = Constant<20> [ORD=23] [ID=12]
        0xdd93d0: i64 = undef [ORD=3] [ID=4]
      0xdde550: i32,ch = load 0xdd9bd0:1, 0xdddbe0, 0xdd93d0<LD4[%24]> [ID=33]
        0xdddbe0: i64 = add 0xdd90d0, 0xdddae0 [ORD=27] [ID=26]
          0xdd90d0: i64 = Register %vreg0 [ID=20]
          0xdddae0: i64 = Constant<4> [ORD=27] [ID=13]
        0xdd93d0: i64 = undef [ORD=3] [ID=4]
In function: main


Output:

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