Results for spec/glsl-1.10/execution/built-in-functions/vs-op-ne-bvec3-bvec3

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.10875082016
note
Returncode was 1
command
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-ne-bvec3-bvec3.shader_test -auto
errors_ignored
  • 0xee7300: i32,ch = load 0xec0140:1, 0xee66f0, 0xebf940<LD4[%10]> [ID=34]
  • 0xebf640: i64 = Register %vreg0 [ID=22]
  • 0xee7700: i32,ch = load 0xec0140:1, 0xebf640, 0xebf940<LD4[%14]> [ID=35]
  • 0xebf640: i64 = Register %vreg0 [ID=22]
  • 0xee7e10: i32,ch = load 0xec0140:1, 0xee7100, 0xebf940<LD4[%20]> [ID=36]
  • 0xebf640: i64 = Register %vreg0 [ID=22]
  • 0xee8210: i32,ch = load 0xec0140:1, 0xee7500, 0xebf940<LD4[%24]> [ID=37]
  • 0xebf640: i64 = Register %vreg0 [ID=22]
  • 0xee8a10: i32,ch = load 0xec0140:1, 0xee7c10, 0xebf940<LD4[%30]> [ID=38]
  • 0xebf640: i64 = Register %vreg0 [ID=22]
  • 0xee9830: i32,ch = load 0xec0140:1, 0xee8010, 0xebf940<LD4[%34]> [ID=39]
  • 0xebf640: i64 = Register %vreg0 [ID=22]
errors
  • LLVM ERROR: Cannot select: 0xee9c30: i32 = sign_extend 0xee8810 [ID=50]
  • 0xee8810: i1 = or 0xee6e00, 0xee8910 [ID=49]
  • 0xee6e00: i1 = setcc 0xee7300, 0xee7700, 0xee6d00 [ORD=20] [ID=44]
  • 0xee66f0: i64 = add 0xebf640, 0xee65f0 [ORD=13] [ID=26]
  • 0xee65f0: i64 = Constant<16> [ORD=13] [ID=10]
  • 0xebf940: i64 = undef [ORD=3] [ID=4]
  • 0xebf940: i64 = undef [ORD=3] [ID=4]
  • 0xee8910: i1 = or 0xee7800, 0xee8310 [ID=48]
  • 0xee7800: i1 = setcc 0xee7e10, 0xee8210, 0xee6d00 [ORD=30] [ID=45]
  • 0xee7100: i64 = add 0xebf640, 0xee7000 [ORD=23] [ID=27]
  • 0xee7000: i64 = Constant<20> [ORD=23] [ID=12]
  • 0xebf940: i64 = undef [ORD=3] [ID=4]
  • 0xee7500: i64 = add 0xebf640, 0xee7400 [ORD=27] [ID=28]
  • 0xee7400: i64 = Constant<4> [ORD=27] [ID=13]
  • 0xebf940: i64 = undef [ORD=3] [ID=4]
  • 0xee8310: i1 = setcc 0xee8a10, 0xee9830, 0xee6d00 [ORD=40] [ID=46]
  • 0xee7c10: i64 = add 0xebf640, 0xee7a00 [ORD=33] [ID=29]
  • 0xee7a00: i64 = Constant<24> [ORD=33] [ID=14]
  • 0xebf940: i64 = undef [ORD=3] [ID=4]
  • 0xee8010: i64 = add 0xebf640, 0xee7f10 [ORD=37] [ID=30]
  • 0xee7f10: i64 = Constant<8> [ORD=37] [ID=15]
  • 0xebf940: i64 = undef [ORD=3] [ID=4]
  • In function: main
info
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0xee9c30: i32 = sign_extend 0xee8810 [ID=50]
  0xee8810: i1 = or 0xee6e00, 0xee8910 [ID=49]
    0xee6e00: i1 = setcc 0xee7300, 0xee7700, 0xee6d00 [ORD=20] [ID=44]
      0xee7300: i32,ch = load 0xec0140:1, 0xee66f0, 0xebf940<LD4[%10]> [ID=34]
        0xee66f0: i64 = add 0xebf640, 0xee65f0 [ORD=13] [ID=26]
          0xebf640: i64 = Register %vreg0 [ID=22]
          0xee65f0: i64 = Constant<16> [ORD=13] [ID=10]
        0xebf940: i64 = undef [ORD=3] [ID=4]
      0xee7700: i32,ch = load 0xec0140:1, 0xebf640, 0xebf940<LD4[%14]> [ID=35]
        0xebf640: i64 = Register %vreg0 [ID=22]
        0xebf940: i64 = undef [ORD=3] [ID=4]
    0xee8910: i1 = or 0xee7800, 0xee8310 [ID=48]
      0xee7800: i1 = setcc 0xee7e10, 0xee8210, 0xee6d00 [ORD=30] [ID=45]
        0xee7e10: i32,ch = load 0xec0140:1, 0xee7100, 0xebf940<LD4[%20]> [ID=36]
          0xee7100: i64 = add 0xebf640, 0xee7000 [ORD=23] [ID=27]
            0xebf640: i64 = Register %vreg0 [ID=22]
            0xee7000: i64 = Constant<20> [ORD=23] [ID=12]
          0xebf940: i64 = undef [ORD=3] [ID=4]
        0xee8210: i32,ch = load 0xec0140:1, 0xee7500, 0xebf940<LD4[%24]> [ID=37]
          0xee7500: i64 = add 0xebf640, 0xee7400 [ORD=27] [ID=28]
            0xebf640: i64 = Register %vreg0 [ID=22]
            0xee7400: i64 = Constant<4> [ORD=27] [ID=13]
          0xebf940: i64 = undef [ORD=3] [ID=4]
      0xee8310: i1 = setcc 0xee8a10, 0xee9830, 0xee6d00 [ORD=40] [ID=46]
        0xee8a10: i32,ch = load 0xec0140:1, 0xee7c10, 0xebf940<LD4[%30]> [ID=38]
          0xee7c10: i64 = add 0xebf640, 0xee7a00 [ORD=33] [ID=29]
            0xebf640: i64 = Register %vreg0 [ID=22]
            0xee7a00: i64 = Constant<24> [ORD=33] [ID=14]
          0xebf940: i64 = undef [ORD=3] [ID=4]
        0xee9830: i32,ch = load 0xec0140:1, 0xee8010, 0xebf940<LD4[%34]> [ID=39]
          0xee8010: i64 = add 0xebf640, 0xee7f10 [ORD=37] [ID=30]
            0xebf640: i64 = Register %vreg0 [ID=22]
            0xee7f10: i64 = Constant<8> [ORD=37] [ID=15]
          0xebf940: i64 = undef [ORD=3] [ID=4]
In function: main


Output:

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