Results for spec/glsl-1.10/execution/built-in-functions/vs-op-ne-bvec3-bvec3-using-if

Overview

Status: fail
Result: fail

Back to summary

Details

Detail Value
returncode 1
time 0.0821781158447
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-ne-bvec3-bvec3-using-if.shader_test -auto
errors_ignored 
  • 0xf7c6e0: i32,ch = load 0xf78850:1, 0xf7b990, 0xf78050<LD4[%10]> [ID=34]
  • 0xf7f740: i64 = Register %vreg0 [ID=22]
  • 0xf7cae0: i32,ch = load 0xf78850:1, 0xf7f740, 0xf78050<LD4[%14]> [ID=35]
  • 0xf7f740: i64 = Register %vreg0 [ID=22]
  • 0xf7d4c0: i32,ch = load 0xf78850:1, 0xf7c4e0, 0xf78050<LD4[%20]> [ID=36]
  • 0xf7f740: i64 = Register %vreg0 [ID=22]
  • 0xf7d8c0: i32,ch = load 0xf78850:1, 0xf7c8e0, 0xf78050<LD4[%24]> [ID=37]
  • 0xf7f740: i64 = Register %vreg0 [ID=22]
  • 0xf7f840: i32,ch = load 0xf78850:1, 0xf7d2c0, 0xf78050<LD4[%30]> [ID=38]
  • 0xf7f740: i64 = Register %vreg0 [ID=22]
  • 0xf7fd40: i32,ch = load 0xf78850:1, 0xf7d6c0, 0xf78050<LD4[%34]> [ID=39]
  • 0xf7f740: i64 = Register %vreg0 [ID=22]
errors 
  • LLVM ERROR: Cannot select: 0xf7dec0: i1 = or 0xf7c1e0, 0xf7dfc0 [ID=49]
  • 0xf7c1e0: i1 = setcc 0xf7c6e0, 0xf7cae0, 0xf7c0e0 [ORD=20] [ID=44]
  • 0xf7b990: i64 = add 0xf7f740, 0xf7b890 [ORD=13] [ID=26]
  • 0xf7b890: i64 = Constant<16> [ORD=13] [ID=10]
  • 0xf78050: i64 = undef [ORD=3] [ID=4]
  • 0xf78050: i64 = undef [ORD=3] [ID=4]
  • 0xf7dfc0: i1 = or 0xf7cbe0, 0xf7d9c0 [ID=48]
  • 0xf7cbe0: i1 = setcc 0xf7d4c0, 0xf7d8c0, 0xf7c0e0 [ORD=30] [ID=45]
  • 0xf7c4e0: i64 = add 0xf7f740, 0xf7c3e0 [ORD=23] [ID=27]
  • 0xf7c3e0: i64 = Constant<20> [ORD=23] [ID=12]
  • 0xf78050: i64 = undef [ORD=3] [ID=4]
  • 0xf7c8e0: i64 = add 0xf7f740, 0xf7c7e0 [ORD=27] [ID=28]
  • 0xf7c7e0: i64 = Constant<4> [ORD=27] [ID=13]
  • 0xf78050: i64 = undef [ORD=3] [ID=4]
  • 0xf7d9c0: i1 = setcc 0xf7f840, 0xf7fd40, 0xf7c0e0 [ORD=40] [ID=46]
  • 0xf7d2c0: i64 = add 0xf7f740, 0xf7cde0 [ORD=33] [ID=29]
  • 0xf7cde0: i64 = Constant<24> [ORD=33] [ID=14]
  • 0xf78050: i64 = undef [ORD=3] [ID=4]
  • 0xf7d6c0: i64 = add 0xf7f740, 0xf7d5c0 [ORD=37] [ID=30]
  • 0xf7d5c0: i64 = Constant<8> [ORD=37] [ID=15]
  • 0xf78050: i64 = undef [ORD=3] [ID=4]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0xf7dec0: i1 = or 0xf7c1e0, 0xf7dfc0 [ID=49]
  0xf7c1e0: i1 = setcc 0xf7c6e0, 0xf7cae0, 0xf7c0e0 [ORD=20] [ID=44]
    0xf7c6e0: i32,ch = load 0xf78850:1, 0xf7b990, 0xf78050<LD4[%10]> [ID=34]
      0xf7b990: i64 = add 0xf7f740, 0xf7b890 [ORD=13] [ID=26]
        0xf7f740: i64 = Register %vreg0 [ID=22]
        0xf7b890: i64 = Constant<16> [ORD=13] [ID=10]
      0xf78050: i64 = undef [ORD=3] [ID=4]
    0xf7cae0: i32,ch = load 0xf78850:1, 0xf7f740, 0xf78050<LD4[%14]> [ID=35]
      0xf7f740: i64 = Register %vreg0 [ID=22]
      0xf78050: i64 = undef [ORD=3] [ID=4]
  0xf7dfc0: i1 = or 0xf7cbe0, 0xf7d9c0 [ID=48]
    0xf7cbe0: i1 = setcc 0xf7d4c0, 0xf7d8c0, 0xf7c0e0 [ORD=30] [ID=45]
      0xf7d4c0: i32,ch = load 0xf78850:1, 0xf7c4e0, 0xf78050<LD4[%20]> [ID=36]
        0xf7c4e0: i64 = add 0xf7f740, 0xf7c3e0 [ORD=23] [ID=27]
          0xf7f740: i64 = Register %vreg0 [ID=22]
          0xf7c3e0: i64 = Constant<20> [ORD=23] [ID=12]
        0xf78050: i64 = undef [ORD=3] [ID=4]
      0xf7d8c0: i32,ch = load 0xf78850:1, 0xf7c8e0, 0xf78050<LD4[%24]> [ID=37]
        0xf7c8e0: i64 = add 0xf7f740, 0xf7c7e0 [ORD=27] [ID=28]
          0xf7f740: i64 = Register %vreg0 [ID=22]
          0xf7c7e0: i64 = Constant<4> [ORD=27] [ID=13]
        0xf78050: i64 = undef [ORD=3] [ID=4]
    0xf7d9c0: i1 = setcc 0xf7f840, 0xf7fd40, 0xf7c0e0 [ORD=40] [ID=46]
      0xf7f840: i32,ch = load 0xf78850:1, 0xf7d2c0, 0xf78050<LD4[%30]> [ID=38]
        0xf7d2c0: i64 = add 0xf7f740, 0xf7cde0 [ORD=33] [ID=29]
          0xf7f740: i64 = Register %vreg0 [ID=22]
          0xf7cde0: i64 = Constant<24> [ORD=33] [ID=14]
        0xf78050: i64 = undef [ORD=3] [ID=4]
      0xf7fd40: i32,ch = load 0xf78850:1, 0xf7d6c0, 0xf78050<LD4[%34]> [ID=39]
        0xf7d6c0: i64 = add 0xf7f740, 0xf7d5c0 [ORD=37] [ID=30]
          0xf7f740: i64 = Register %vreg0 [ID=22]
          0xf7d5c0: i64 = Constant<8> [ORD=37] [ID=15]
        0xf78050: i64 = undef [ORD=3] [ID=4]
In function: main


Output:

Back to summary