Results for spec/glsl-1.10/execution/built-in-functions/vs-op-ne-ivec2-ivec2

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.0945820808411
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-ne-ivec2-ivec2.shader_test -auto
errors_ignored 
  • 0x1de6760: i32,ch = load 0x1de2900:1, 0x1de5a10, 0x1de2100<LD4[%10]> [ID=30]
  • 0x1de1e00: i64 = Register %vreg0 [ID=20]
  • 0x1de6b60: i32,ch = load 0x1de2900:1, 0x1de1e00, 0x1de2100<LD4[%14]> [ID=31]
  • 0x1de1e00: i64 = Register %vreg0 [ID=20]
  • 0x1de9700: i32,ch = load 0x1de2900:1, 0x1de6560, 0x1de2100<LD4[%20]> [ID=32]
  • 0x1de1e00: i64 = Register %vreg0 [ID=20]
  • 0x1de72d0: i32,ch = load 0x1de2900:1, 0x1de6960, 0x1de2100<LD4[%24]> [ID=33]
  • 0x1de1e00: i64 = Register %vreg0 [ID=20]
errors 
  • LLVM ERROR: Cannot select: 0x1de77d0: i32 = sign_extend 0x1de73d0 [ID=42]
  • 0x1de73d0: i1 = or 0x1de6260, 0x1de6c60 [ID=41]
  • 0x1de6260: i1 = setcc 0x1de6760, 0x1de6b60, 0x1de6160 [ORD=20] [ID=38]
  • 0x1de5a10: i64 = add 0x1de1e00, 0x1de5910 [ORD=13] [ID=24]
  • 0x1de5910: i64 = Constant<16> [ORD=13] [ID=10]
  • 0x1de2100: i64 = undef [ORD=3] [ID=4]
  • 0x1de2100: i64 = undef [ORD=3] [ID=4]
  • 0x1de6c60: i1 = setcc 0x1de9700, 0x1de72d0, 0x1de6160 [ORD=30] [ID=39]
  • 0x1de6560: i64 = add 0x1de1e00, 0x1de6460 [ORD=23] [ID=25]
  • 0x1de6460: i64 = Constant<20> [ORD=23] [ID=12]
  • 0x1de2100: i64 = undef [ORD=3] [ID=4]
  • 0x1de6960: i64 = add 0x1de1e00, 0x1de6860 [ORD=27] [ID=26]
  • 0x1de6860: i64 = Constant<4> [ORD=27] [ID=13]
  • 0x1de2100: i64 = undef [ORD=3] [ID=4]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x1de77d0: i32 = sign_extend 0x1de73d0 [ID=42]
  0x1de73d0: i1 = or 0x1de6260, 0x1de6c60 [ID=41]
    0x1de6260: i1 = setcc 0x1de6760, 0x1de6b60, 0x1de6160 [ORD=20] [ID=38]
      0x1de6760: i32,ch = load 0x1de2900:1, 0x1de5a10, 0x1de2100<LD4[%10]> [ID=30]
        0x1de5a10: i64 = add 0x1de1e00, 0x1de5910 [ORD=13] [ID=24]
          0x1de1e00: i64 = Register %vreg0 [ID=20]
          0x1de5910: i64 = Constant<16> [ORD=13] [ID=10]
        0x1de2100: i64 = undef [ORD=3] [ID=4]
      0x1de6b60: i32,ch = load 0x1de2900:1, 0x1de1e00, 0x1de2100<LD4[%14]> [ID=31]
        0x1de1e00: i64 = Register %vreg0 [ID=20]
        0x1de2100: i64 = undef [ORD=3] [ID=4]
    0x1de6c60: i1 = setcc 0x1de9700, 0x1de72d0, 0x1de6160 [ORD=30] [ID=39]
      0x1de9700: i32,ch = load 0x1de2900:1, 0x1de6560, 0x1de2100<LD4[%20]> [ID=32]
        0x1de6560: i64 = add 0x1de1e00, 0x1de6460 [ORD=23] [ID=25]
          0x1de1e00: i64 = Register %vreg0 [ID=20]
          0x1de6460: i64 = Constant<20> [ORD=23] [ID=12]
        0x1de2100: i64 = undef [ORD=3] [ID=4]
      0x1de72d0: i32,ch = load 0x1de2900:1, 0x1de6960, 0x1de2100<LD4[%24]> [ID=33]
        0x1de6960: i64 = add 0x1de1e00, 0x1de6860 [ORD=27] [ID=26]
          0x1de1e00: i64 = Register %vreg0 [ID=20]
          0x1de6860: i64 = Constant<4> [ORD=27] [ID=13]
        0x1de2100: i64 = undef [ORD=3] [ID=4]
In function: main


Output:

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