Results for spec/glsl-1.10/execution/built-in-functions/vs-op-ne-ivec3-ivec3

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.11841583252
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-ne-ivec3-ivec3.shader_test -auto
errors_ignored 
  • 0x988080: i32,ch = load 0x984240:1, 0x987380, 0x983a40<LD4[%10]> [ID=34]
  • 0x983740: i64 = Register %vreg0 [ID=22]
  • 0x988480: i32,ch = load 0x984240:1, 0x983740, 0x983a40<LD4[%14]> [ID=35]
  • 0x983740: i64 = Register %vreg0 [ID=22]
  • 0x988e60: i32,ch = load 0x984240:1, 0x987e80, 0x983a40<LD4[%20]> [ID=36]
  • 0x983740: i64 = Register %vreg0 [ID=22]
  • 0x989260: i32,ch = load 0x984240:1, 0x988280, 0x983a40<LD4[%24]> [ID=37]
  • 0x983740: i64 = Register %vreg0 [ID=22]
  • 0x989a60: i32,ch = load 0x984240:1, 0x988c60, 0x983a40<LD4[%30]> [ID=38]
  • 0x983740: i64 = Register %vreg0 [ID=22]
  • 0x98b0e0: i32,ch = load 0x984240:1, 0x989060, 0x983a40<LD4[%34]> [ID=39]
  • 0x983740: i64 = Register %vreg0 [ID=22]
errors 
  • LLVM ERROR: Cannot select: 0x98b4e0: i32 = sign_extend 0x989860 [ID=50]
  • 0x989860: i1 = or 0x987b80, 0x989960 [ID=49]
  • 0x987b80: i1 = setcc 0x988080, 0x988480, 0x987a80 [ORD=20] [ID=44]
  • 0x987380: i64 = add 0x983740, 0x987280 [ORD=13] [ID=26]
  • 0x987280: i64 = Constant<16> [ORD=13] [ID=10]
  • 0x983a40: i64 = undef [ORD=3] [ID=4]
  • 0x983a40: i64 = undef [ORD=3] [ID=4]
  • 0x989960: i1 = or 0x988580, 0x989360 [ID=48]
  • 0x988580: i1 = setcc 0x988e60, 0x989260, 0x987a80 [ORD=30] [ID=45]
  • 0x987e80: i64 = add 0x983740, 0x987d80 [ORD=23] [ID=27]
  • 0x987d80: i64 = Constant<20> [ORD=23] [ID=12]
  • 0x983a40: i64 = undef [ORD=3] [ID=4]
  • 0x988280: i64 = add 0x983740, 0x988180 [ORD=27] [ID=28]
  • 0x988180: i64 = Constant<4> [ORD=27] [ID=13]
  • 0x983a40: i64 = undef [ORD=3] [ID=4]
  • 0x989360: i1 = setcc 0x989a60, 0x98b0e0, 0x987a80 [ORD=40] [ID=46]
  • 0x988c60: i64 = add 0x983740, 0x988780 [ORD=33] [ID=29]
  • 0x988780: i64 = Constant<24> [ORD=33] [ID=14]
  • 0x983a40: i64 = undef [ORD=3] [ID=4]
  • 0x989060: i64 = add 0x983740, 0x988f60 [ORD=37] [ID=30]
  • 0x988f60: i64 = Constant<8> [ORD=37] [ID=15]
  • 0x983a40: i64 = undef [ORD=3] [ID=4]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x98b4e0: i32 = sign_extend 0x989860 [ID=50]
  0x989860: i1 = or 0x987b80, 0x989960 [ID=49]
    0x987b80: i1 = setcc 0x988080, 0x988480, 0x987a80 [ORD=20] [ID=44]
      0x988080: i32,ch = load 0x984240:1, 0x987380, 0x983a40<LD4[%10]> [ID=34]
        0x987380: i64 = add 0x983740, 0x987280 [ORD=13] [ID=26]
          0x983740: i64 = Register %vreg0 [ID=22]
          0x987280: i64 = Constant<16> [ORD=13] [ID=10]
        0x983a40: i64 = undef [ORD=3] [ID=4]
      0x988480: i32,ch = load 0x984240:1, 0x983740, 0x983a40<LD4[%14]> [ID=35]
        0x983740: i64 = Register %vreg0 [ID=22]
        0x983a40: i64 = undef [ORD=3] [ID=4]
    0x989960: i1 = or 0x988580, 0x989360 [ID=48]
      0x988580: i1 = setcc 0x988e60, 0x989260, 0x987a80 [ORD=30] [ID=45]
        0x988e60: i32,ch = load 0x984240:1, 0x987e80, 0x983a40<LD4[%20]> [ID=36]
          0x987e80: i64 = add 0x983740, 0x987d80 [ORD=23] [ID=27]
            0x983740: i64 = Register %vreg0 [ID=22]
            0x987d80: i64 = Constant<20> [ORD=23] [ID=12]
          0x983a40: i64 = undef [ORD=3] [ID=4]
        0x989260: i32,ch = load 0x984240:1, 0x988280, 0x983a40<LD4[%24]> [ID=37]
          0x988280: i64 = add 0x983740, 0x988180 [ORD=27] [ID=28]
            0x983740: i64 = Register %vreg0 [ID=22]
            0x988180: i64 = Constant<4> [ORD=27] [ID=13]
          0x983a40: i64 = undef [ORD=3] [ID=4]
      0x989360: i1 = setcc 0x989a60, 0x98b0e0, 0x987a80 [ORD=40] [ID=46]
        0x989a60: i32,ch = load 0x984240:1, 0x988c60, 0x983a40<LD4[%30]> [ID=38]
          0x988c60: i64 = add 0x983740, 0x988780 [ORD=33] [ID=29]
            0x983740: i64 = Register %vreg0 [ID=22]
            0x988780: i64 = Constant<24> [ORD=33] [ID=14]
          0x983a40: i64 = undef [ORD=3] [ID=4]
        0x98b0e0: i32,ch = load 0x984240:1, 0x989060, 0x983a40<LD4[%34]> [ID=39]
          0x989060: i64 = add 0x983740, 0x988f60 [ORD=37] [ID=30]
            0x983740: i64 = Register %vreg0 [ID=22]
            0x988f60: i64 = Constant<8> [ORD=37] [ID=15]
          0x983a40: i64 = undef [ORD=3] [ID=4]
In function: main


Output:

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