Results for spec/glsl-1.10/execution/built-in-functions/vs-op-ne-ivec3-ivec3-using-if

Overview

Status: fail
Result: fail

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Details

Detail Value
returncode 1
time 0.103056907654
note 
Returncode was 1
command 
/home/daenzer/src/piglit-git/piglit/framework/../bin/shader_runner tests/../generated_tests/spec/glsl-1.10/execution/built-in-functions/vs-op-ne-ivec3-ivec3-using-if.shader_test -auto
errors_ignored 
  • 0x27550c0: i32,ch = load 0x2751280:1, 0x27543c0, 0x2750a80<LD4[%10]> [ID=34]
  • 0x2758120: i64 = Register %vreg0 [ID=22]
  • 0x27554c0: i32,ch = load 0x2751280:1, 0x2758120, 0x2750a80<LD4[%14]> [ID=35]
  • 0x2758120: i64 = Register %vreg0 [ID=22]
  • 0x2755ea0: i32,ch = load 0x2751280:1, 0x2754ec0, 0x2750a80<LD4[%20]> [ID=36]
  • 0x2758120: i64 = Register %vreg0 [ID=22]
  • 0x27562a0: i32,ch = load 0x2751280:1, 0x27552c0, 0x2750a80<LD4[%24]> [ID=37]
  • 0x2758120: i64 = Register %vreg0 [ID=22]
  • 0x2758220: i32,ch = load 0x2751280:1, 0x2755ca0, 0x2750a80<LD4[%30]> [ID=38]
  • 0x2758120: i64 = Register %vreg0 [ID=22]
  • 0x2758720: i32,ch = load 0x2751280:1, 0x27560a0, 0x2750a80<LD4[%34]> [ID=39]
  • 0x2758120: i64 = Register %vreg0 [ID=22]
errors 
  • LLVM ERROR: Cannot select: 0x27568a0: i1 = or 0x2754bc0, 0x27569a0 [ID=49]
  • 0x2754bc0: i1 = setcc 0x27550c0, 0x27554c0, 0x2754ac0 [ORD=20] [ID=44]
  • 0x27543c0: i64 = add 0x2758120, 0x27542c0 [ORD=13] [ID=26]
  • 0x27542c0: i64 = Constant<16> [ORD=13] [ID=10]
  • 0x2750a80: i64 = undef [ORD=3] [ID=4]
  • 0x2750a80: i64 = undef [ORD=3] [ID=4]
  • 0x27569a0: i1 = or 0x27555c0, 0x27563a0 [ID=48]
  • 0x27555c0: i1 = setcc 0x2755ea0, 0x27562a0, 0x2754ac0 [ORD=30] [ID=45]
  • 0x2754ec0: i64 = add 0x2758120, 0x2754dc0 [ORD=23] [ID=27]
  • 0x2754dc0: i64 = Constant<20> [ORD=23] [ID=12]
  • 0x2750a80: i64 = undef [ORD=3] [ID=4]
  • 0x27552c0: i64 = add 0x2758120, 0x27551c0 [ORD=27] [ID=28]
  • 0x27551c0: i64 = Constant<4> [ORD=27] [ID=13]
  • 0x2750a80: i64 = undef [ORD=3] [ID=4]
  • 0x27563a0: i1 = setcc 0x2758220, 0x2758720, 0x2754ac0 [ORD=40] [ID=46]
  • 0x2755ca0: i64 = add 0x2758120, 0x27557c0 [ORD=33] [ID=29]
  • 0x27557c0: i64 = Constant<24> [ORD=33] [ID=14]
  • 0x2750a80: i64 = undef [ORD=3] [ID=4]
  • 0x27560a0: i64 = add 0x2758120, 0x2755fa0 [ORD=37] [ID=30]
  • 0x2755fa0: i64 = Constant<8> [ORD=37] [ID=15]
  • 0x2750a80: i64 = undef [ORD=3] [ID=4]
  • In function: main
info 
Returncode: 1

Errors:
LLVM ERROR: Cannot select: 0x27568a0: i1 = or 0x2754bc0, 0x27569a0 [ID=49]
  0x2754bc0: i1 = setcc 0x27550c0, 0x27554c0, 0x2754ac0 [ORD=20] [ID=44]
    0x27550c0: i32,ch = load 0x2751280:1, 0x27543c0, 0x2750a80<LD4[%10]> [ID=34]
      0x27543c0: i64 = add 0x2758120, 0x27542c0 [ORD=13] [ID=26]
        0x2758120: i64 = Register %vreg0 [ID=22]
        0x27542c0: i64 = Constant<16> [ORD=13] [ID=10]
      0x2750a80: i64 = undef [ORD=3] [ID=4]
    0x27554c0: i32,ch = load 0x2751280:1, 0x2758120, 0x2750a80<LD4[%14]> [ID=35]
      0x2758120: i64 = Register %vreg0 [ID=22]
      0x2750a80: i64 = undef [ORD=3] [ID=4]
  0x27569a0: i1 = or 0x27555c0, 0x27563a0 [ID=48]
    0x27555c0: i1 = setcc 0x2755ea0, 0x27562a0, 0x2754ac0 [ORD=30] [ID=45]
      0x2755ea0: i32,ch = load 0x2751280:1, 0x2754ec0, 0x2750a80<LD4[%20]> [ID=36]
        0x2754ec0: i64 = add 0x2758120, 0x2754dc0 [ORD=23] [ID=27]
          0x2758120: i64 = Register %vreg0 [ID=22]
          0x2754dc0: i64 = Constant<20> [ORD=23] [ID=12]
        0x2750a80: i64 = undef [ORD=3] [ID=4]
      0x27562a0: i32,ch = load 0x2751280:1, 0x27552c0, 0x2750a80<LD4[%24]> [ID=37]
        0x27552c0: i64 = add 0x2758120, 0x27551c0 [ORD=27] [ID=28]
          0x2758120: i64 = Register %vreg0 [ID=22]
          0x27551c0: i64 = Constant<4> [ORD=27] [ID=13]
        0x2750a80: i64 = undef [ORD=3] [ID=4]
    0x27563a0: i1 = setcc 0x2758220, 0x2758720, 0x2754ac0 [ORD=40] [ID=46]
      0x2758220: i32,ch = load 0x2751280:1, 0x2755ca0, 0x2750a80<LD4[%30]> [ID=38]
        0x2755ca0: i64 = add 0x2758120, 0x27557c0 [ORD=33] [ID=29]
          0x2758120: i64 = Register %vreg0 [ID=22]
          0x27557c0: i64 = Constant<24> [ORD=33] [ID=14]
        0x2750a80: i64 = undef [ORD=3] [ID=4]
      0x2758720: i32,ch = load 0x2751280:1, 0x27560a0, 0x2750a80<LD4[%34]> [ID=39]
        0x27560a0: i64 = add 0x2758120, 0x2755fa0 [ORD=37] [ID=30]
          0x2758120: i64 = Register %vreg0 [ID=22]
          0x2755fa0: i64 = Constant<8> [ORD=37] [ID=15]
        0x2750a80: i64 = undef [ORD=3] [ID=4]
In function: main


Output:

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