brw_wm.h

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00001 /*
00002  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
00003  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
00004  develop this 3D driver.
00005  
00006  Permission is hereby granted, free of charge, to any person obtaining
00007  a copy of this software and associated documentation files (the
00008  "Software"), to deal in the Software without restriction, including
00009  without limitation the rights to use, copy, modify, merge, publish,
00010  distribute, sublicense, and/or sell copies of the Software, and to
00011  permit persons to whom the Software is furnished to do so, subject to
00012  the following conditions:
00013  
00014  The above copyright notice and this permission notice (including the
00015  next paragraph) shall be included in all copies or substantial
00016  portions of the Software.
00017  
00018  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
00019  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00020  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00021  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
00022  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
00023  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
00024  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
00025  
00026  **********************************************************************/
00027  /*
00028   * Authors:
00029   *   Keith Whitwell <keith@tungstengraphics.com>
00030   */
00031               
00032 
00033 #ifndef BRW_WM_H
00034 #define BRW_WM_H
00035 
00036 
00037 #include "brw_context.h"
00038 #include "brw_eu.h"
00039 
00040 /* A big lookup table is used to figure out which and how many
00041  * additional regs will inserted before the main payload in the WM
00042  * program execution.  These mainly relate to depth and stencil
00043  * processing and the early-depth-test optimization.
00044  */
00045 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
00046 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
00047 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
00048 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
00049 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
00050 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
00051 #define IZ_EARLY_DEPTH_TEST_BIT     0x40
00052 #define IZ_BIT_MAX                  0x80
00053 
00054 #define AA_NEVER     0
00055 #define AA_SOMETIMES 1
00056 #define AA_ALWAYS    2
00057 
00058 struct brw_wm_prog_key {
00059    unsigned source_depth_reg:3;
00060    unsigned aa_dest_stencil_reg:3;
00061    unsigned dest_depth_reg:3;
00062    unsigned nr_depth_regs:3;
00063    unsigned shadowtex_mask:8;
00064    unsigned computes_depth:1;   /* could be derived from program string */
00065    unsigned source_depth_to_render_target:1;
00066    unsigned runtime_check_aads_emit:1;
00067 
00068    unsigned yuvtex_mask:8;
00069 
00070    unsigned program_string_id;
00071 };
00072 
00073 
00074 
00075 
00076 
00077 #define PROGRAM_INTERNAL_PARAM
00078 #define MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS 1024 /* 72 for GL_ARB_f_p */
00079 #define BRW_WM_MAX_INSN  (MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS*3 + PIPE_MAX_ATTRIBS + 3)
00080 #define BRW_WM_MAX_GRF   128            /* hardware limit */
00081 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
00082 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
00083 #define BRW_WM_MAX_PARAM 256
00084 #define BRW_WM_MAX_CONST 256
00085 #define BRW_WM_MAX_KILLS MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS
00086 
00087 #define PAYLOAD_DEPTH     (PIPE_MAX_ATTRIBS)
00088 
00089 #define MAX_IFSN 32
00090 #define MAX_LOOP_DEPTH 32
00091 
00092 struct brw_wm_compile {
00093    struct brw_compile func;
00094    struct brw_wm_prog_key key;
00095    struct brw_wm_prog_data prog_data; /* result */
00096 
00097    struct brw_fragment_program *fp;
00098 
00099    unsigned grf_limit;
00100    unsigned max_wm_grf;
00101 
00102 
00103    struct brw_reg pixel_xy[2];
00104    struct brw_reg delta_xy[2];
00105    struct brw_reg pixel_w;
00106 
00107 
00108    struct brw_reg wm_regs[8][32][4];
00109 
00110    struct brw_reg payload_depth[4];
00111    struct brw_reg payload_coef[16];
00112 
00113    struct brw_reg emit_mask_reg;
00114 
00115    struct brw_instruction *if_inst[MAX_IFSN];
00116    int if_insn;
00117 
00118    struct brw_instruction *loop_inst[MAX_LOOP_DEPTH];
00119    int loop_insn;
00120 
00121    struct brw_instruction *inst0;
00122    struct brw_instruction *inst1;
00123 
00124    struct brw_reg stack;
00125    struct brw_indirect stack_index;
00126 
00127    unsigned reg_index;
00128 
00129    unsigned tmp_start;
00130    unsigned tmp_index;
00131 };
00132 
00133 
00134 
00135 void brw_wm_lookup_iz( unsigned line_aa,
00136                        unsigned lookup,
00137                        struct brw_wm_prog_key *key );
00138 
00139 void brw_wm_glsl_emit(struct brw_wm_compile *c);
00140 void brw_wm_emit_decls(struct brw_wm_compile *c);
00141 
00142 #endif

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