u_cpu_detect.c File Reference

Include dependency graph for u_cpu_detect.c:

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Functions
static int	has_cpuid (void)
static int	cpuid (unsigned int ax, unsigned int *p)
static void	check_os_katmai_support (void)
void	cpu_detect_initialize ()
struct cpu_detect_caps *	cpu_detect_get_caps ()
int	cpu_detect_get_tsc ()
int	cpu_detect_get_mmx ()
int	cpu_detect_get_mmx2 ()
int	cpu_detect_get_sse ()
int	cpu_detect_get_sse2 ()
int	cpu_detect_get_sse3 ()
int	cpu_detect_get_ssse3 ()
int	cpu_detect_get_3dnow ()
int	cpu_detect_get_3dnow2 ()
int	cpu_detect_get_altivec ()
Variables
static struct cpu_detect_caps	__cpu_detect_caps
static int	__cpu_detect_initialized = 0

---

Function Documentation

static void check_os_katmai_support

(

void

)

[static]

Definition at line 192 of file u_cpu_detect.c.

References __cpu_detect_caps, cpu_detect_caps::hasSSE, and cpu_detect_caps::hasSSE2.

{
#if defined(ARCH_X86)
#if defined(OS_FREEBSD)
        int has_sse=0, ret;
        int len = sizeof (has_sse);

        ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0);
        if (ret || !has_sse)
                __cpu_detect_caps.hasSSE=0;

#elif defined(OS_NETBSD) || defined(OS_OPENBSD)
        int has_sse, has_sse2, ret, mib[2];
        int varlen;

        mib[0] = CTL_MACHDEP;
        mib[1] = CPU_SSE;
        varlen = sizeof (has_sse);

        ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
        if (ret < 0 || !has_sse) {
                __cpu_detect_caps.hasSSE = 0;
        } else {
                __cpu_detect_caps.hasSSE = 1;
        }

        mib[1] = CPU_SSE2;
        varlen = sizeof (has_sse2);
        ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
        if (ret < 0 || !has_sse2) {
                __cpu_detect_caps.hasSSE2 = 0;
        } else {
                __cpu_detect_caps.hasSSE2 = 1;
        }
        __cpu_detect_caps.hasSSE = 0; /* FIXME ?!?!? */

#elif defined(OS_WIN32)
        LPTOP_LEVEL_EXCEPTION_FILTER exc_fil;
        if (__cpu_detect_caps.hasSSE) {
                exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
                __asm __volatile ("xorps %xmm0, %xmm0");
                SetUnhandledExceptionFilter(exc_fil);
        }
#elif defined(OS_LINUX)
        struct sigaction saved_sigill;
        struct sigaction saved_sigfpe;

        /* Save the original signal handlers.
        */
        sigaction(SIGILL, NULL, &saved_sigill);
        sigaction(SIGFPE, NULL, &saved_sigfpe);

        signal(SIGILL, (void (*)(int))sigill_handler_sse);
        signal(SIGFPE, (void (*)(int))sigfpe_handler_sse);

        /* Emulate test for OSFXSR in CR4.  The OS will set this bit if it
         * supports the extended FPU save and restore required for SSE.  If
         * we execute an SSE instruction on a PIII and get a SIGILL, the OS
         * doesn't support Streaming SIMD Exceptions, even if the processor
         * does.
         */
        if (__cpu_detect_caps.hasSSE) {
                __asm __volatile ("xorps %xmm1, %xmm0");
        }

        /* Emulate test for OSXMMEXCPT in CR4.  The OS will set this bit if
         * it supports unmasked SIMD FPU exceptions.  If we unmask the
         * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
         * doesn't support unmasked SIMD FPU exceptions.  If we get a SIGFPE
         * as expected, we're okay but we need to clean up after it.
         *
         * Are we being too stringent in our requirement that the OS support
         * unmasked exceptions?  Certain RedHat 2.2 kernels enable SSE by
         * setting CR4.OSFXSR but don't support unmasked exceptions.  Win98
         * doesn't even support them.  We at least know the user-space SSE
         * support is good in kernels that do support unmasked exceptions,
         * and therefore to be safe I'm going to leave this test in here.
         */
        if (__cpu_detect_caps.hasSSE) {
                //      test_os_katmai_exception_support();
        }

        /* Restore the original signal handlers.
        */
        sigaction(SIGILL, &saved_sigill, NULL);
        sigaction(SIGFPE, &saved_sigfpe, NULL);

#else
        /* We can't use POSIX signal handling to test the availability of
         * SSE, so we disable it by default.
         */
        __cpu_detect_caps.hasSSE = 0;
#endif /* __linux__ */
#endif
}

int cpu_detect_get_3dnow

(

void

)

Definition at line 492 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::has3DNow.

{
        return __cpu_detect_caps.has3DNow;
}

int cpu_detect_get_3dnow2

(

void

)

Definition at line 497 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::has3DNowExt.

{
        return __cpu_detect_caps.has3DNowExt;
}

int cpu_detect_get_altivec

(

void

)

Definition at line 502 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasAltiVec.

{
        return __cpu_detect_caps.hasAltiVec;
}

struct cpu_detect_caps* cpu_detect_get_caps

(

void

)

[read]

Definition at line 451 of file u_cpu_detect.c.

References __cpu_detect_caps.

{
        return &__cpu_detect_caps;
}

int cpu_detect_get_mmx

(

void

)

Definition at line 462 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasMMX.

{
        return __cpu_detect_caps.hasMMX;
}

int cpu_detect_get_mmx2

(

void

)

Definition at line 467 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasMMX2.

{
        return __cpu_detect_caps.hasMMX2;
}

int cpu_detect_get_sse

(

void

)

Definition at line 472 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasSSE.

{
        return __cpu_detect_caps.hasSSE;
}

int cpu_detect_get_sse2

(

void

)

Definition at line 477 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasSSE2.

{
        return __cpu_detect_caps.hasSSE2;
}

int cpu_detect_get_sse3

(

void

)

Definition at line 482 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasSSE3.

{
        return __cpu_detect_caps.hasSSE3;
}

int cpu_detect_get_ssse3

(

void

)

Definition at line 487 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasSSSE3.

{
        return __cpu_detect_caps.hasSSSE3;
}

int cpu_detect_get_tsc

(

void

)

Definition at line 457 of file u_cpu_detect.c.

References __cpu_detect_caps, and cpu_detect_caps::hasTSC.

{
        return __cpu_detect_caps.hasTSC;
}

void cpu_detect_initialize

(

void

)

Definition at line 332 of file u_cpu_detect.c.

References __cpu_detect_caps, __cpu_detect_initialized, cpu_detect_caps::cacheline, check_os_katmai_support(), CPU_DETECT_TYPE_ALPHA, CPU_DETECT_TYPE_MIPS, CPU_DETECT_TYPE_OTHER, CPU_DETECT_TYPE_POWERPC, CPU_DETECT_TYPE_SPARC, CPU_DETECT_TYPE_X86, cpuid(), cpu_detect_caps::has3DNow, cpu_detect_caps::has3DNowExt, has_cpuid(), cpu_detect_caps::hasMMX, cpu_detect_caps::hasMMX2, cpu_detect_caps::hasSSE, cpu_detect_caps::hasSSE2, cpu_detect_caps::hasSSE3, cpu_detect_caps::hasSSSE3, cpu_detect_caps::hasTSC, cpu_detect_caps::nrcpu, cpu_detect_caps::type, and cpu_detect_caps::x86cpuType.

{
        unsigned int regs[4];
        unsigned int regs2[4];

        int mib[2], ncpu;
        int len;

        memset(&__cpu_detect_caps, 0, sizeof (struct cpu_detect_caps));

        /* Check for arch type */
#if defined(ARCH_MIPS)
        __cpu_detect_caps.type = CPU_DETECT_TYPE_MIPS;
#elif defined(ARCH_ALPHA)
        __cpu_detect_caps.type = CPU_DETECT_TYPE_ALPHA;
#elif defined(ARCH_SPARC)
        __cpu_detect_caps.type = CPU_DETECT_TYPE_SPARC;
#elif defined(ARCH_X86)
        __cpu_detect_caps.type = CPU_DETECT_TYPE_X86;
#elif defined(ARCH_POWERPC)
        __cpu_detect_caps.type = CPU_DETECT_TYPE_POWERPC;
#else
        __cpu_detect_caps.type = CPU_DETECT_TYPE_OTHER;
#endif

        /* Count the number of CPUs in system */
#if !defined(OS_WIN32) && !defined(OS_UNKNOWN) && defined(_SC_NPROCESSORS_ONLN)
        __cpu_detect_caps.nrcpu = sysconf(_SC_NPROCESSORS_ONLN);
        if (__cpu_detect_caps.nrcpu == -1)
                __cpu_detect_caps.nrcpu = 1;

#elif defined(OS_NETBSD) || defined(OS_FREEBSD) || defined(OS_OPENBSD)

        mib[0] = CTL_HW;
        mib[1] = HW_NCPU;

        len = sizeof (ncpu);
        sysctl(mib, 2, &ncpu, &len, NULL, 0);
        __cpu_detect_caps.nrcpu = ncpu;

#else
        __cpu_detect_caps.nrcpu = 1;
#endif

#if defined(ARCH_X86)
        /* No cpuid, old 486 or lower */
        if (has_cpuid() == 0)
                return;

        __cpu_detect_caps.cacheline = 32;

        /* Get max cpuid level */
        cpuid(0x00000000, regs);

        if (regs[0] >= 0x00000001) {
                unsigned int cacheline;

                cpuid (0x00000001, regs2);

                __cpu_detect_caps.x86cpuType = (regs2[0] >> 8) & 0xf;
                if (__cpu_detect_caps.x86cpuType == 0xf)
                    __cpu_detect_caps.x86cpuType = 8 + ((regs2[0] >> 20) & 255); /* use extended family (P4, IA64) */

                /* general feature flags */
                __cpu_detect_caps.hasTSC  = (regs2[3] & (1 << 8  )) >>  8; /* 0x0000010 */
                __cpu_detect_caps.hasMMX  = (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
                __cpu_detect_caps.hasSSE  = (regs2[3] & (1 << 25 )) >> 25; /* 0x2000000 */
                __cpu_detect_caps.hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; /* 0x4000000 */
                __cpu_detect_caps.hasSSE3 = (regs2[2] & (1));          /* 0x0000001 */
                __cpu_detect_caps.hasSSSE3 = (regs2[2] & (1 << 9 )) >> 9;   /* 0x0000020 */
                __cpu_detect_caps.hasMMX2 = __cpu_detect_caps.hasSSE; /* SSE cpus supports mmxext too */

                cacheline = ((regs2[1] >> 8) & 0xFF) * 8;
                if (cacheline > 0)
                        __cpu_detect_caps.cacheline = cacheline;
        }

        cpuid(0x80000000, regs);

        if (regs[0] >= 0x80000001) {

                cpuid(0x80000001, regs2);

                __cpu_detect_caps.hasMMX  |= (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
                __cpu_detect_caps.hasMMX2 |= (regs2[3] & (1 << 22 )) >> 22; /* 0x400000 */
                __cpu_detect_caps.has3DNow    = (regs2[3] & (1 << 31 )) >> 31; /* 0x80000000 */
                __cpu_detect_caps.has3DNowExt = (regs2[3] & (1 << 30 )) >> 30;
        }

        if (regs[0] >= 0x80000006) {
                cpuid(0x80000006, regs2);
                __cpu_detect_caps.cacheline = regs2[2] & 0xFF;
        }


#if defined(OS_LINUX) || defined(OS_FREEBSD) || defined(OS_NETBSD) || defined(OS_CYGWIN) || defined(OS_OPENBSD)
        if (__cpu_detect_caps.hasSSE)
                check_os_katmai_support();

        if (!__cpu_detect_caps.hasSSE) {
                __cpu_detect_caps.hasSSE2 = 0;
                __cpu_detect_caps.hasSSE3 = 0;
                __cpu_detect_caps.hasSSSE3 = 0;
        }
#else
        __cpu_detect_caps.hasSSE = 0;
        __cpu_detect_caps.hasSSE2 = 0;
        __cpu_detect_caps.hasSSE3 = 0;
        __cpu_detect_caps.hasSSSE3 = 0;
#endif
#endif /* ARCH_X86 */

#if defined(ARCH_POWERPC)
        check_os_altivec_support();
#endif /* ARCH_POWERPC */

        __cpu_detect_initialized = 1;
}

static int cpuid	(	unsigned int	ax,
		unsigned int *	p
	)			[static]

Definition at line 313 of file u_cpu_detect.c.

{
#if defined(ARCH_X86)
        unsigned int flags;

        __asm __volatile
                ("movl %%ebx, %%esi\n\t"
                 "cpuid\n\t"
                 "xchgl %%ebx, %%esi"
                 : "=a" (p[0]), "=S" (p[1]),
                 "=c" (p[2]), "=d" (p[3])
                 : "0" (ax));

        return 0;
#else
        return -1;
#endif
}

static int has_cpuid

(

void

)

[static]

Definition at line 289 of file u_cpu_detect.c.

{
#if defined(ARCH_X86)
        int a, c;

        __asm __volatile
                ("pushf\n"
                 "popl %0\n"
                 "movl %0, %1\n"
                 "xorl $0x200000, %0\n"
                 "push %0\n"
                 "popf\n"
                 "pushf\n"
                 "popl %0\n"
                 : "=a" (a), "=c" (c)
                 :
                 : "cc");

        return a != c;
#else
        return 0;
#endif
}

---

Variable Documentation

struct cpu_detect_caps __cpu_detect_caps [static]

Definition at line 76 of file u_cpu_detect.c.

int __cpu_detect_initialized = 0 [static]

Definition at line 77 of file u_cpu_detect.c.

---