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Defines | |
#define | I915_SET_FIELD(var, mask, value) (var &= ~(mask), var |= value) |
#define | CMD_3D (0x3<<29) |
#define | PRIM3D_INLINE (CMD_3D | (0x1f<<24)) |
#define | PRIM3D_TRILIST (0x0<<18) |
#define | PRIM3D_TRISTRIP (0x1<<18) |
#define | PRIM3D_TRISTRIP_RVRSE (0x2<<18) |
#define | PRIM3D_TRIFAN (0x3<<18) |
#define | PRIM3D_POLY (0x4<<18) |
#define | PRIM3D_LINELIST (0x5<<18) |
#define | PRIM3D_LINESTRIP (0x6<<18) |
#define | PRIM3D_RECTLIST (0x7<<18) |
#define | PRIM3D_POINTLIST (0x8<<18) |
#define | PRIM3D_DIB (0x9<<18) |
#define | PRIM3D_CLEAR_RECT (0xa<<18) |
#define | PRIM3D_ZONE_INIT (0xd<<18) |
#define | PRIM3D_MASK (0x1f<<18) |
#define | _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) |
#define | AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) |
#define | AA_LINE_ECAAR_WIDTH_0_5 0 |
#define | AA_LINE_ECAAR_WIDTH_1_0 (1<<14) |
#define | AA_LINE_ECAAR_WIDTH_2_0 (2<<14) |
#define | AA_LINE_ECAAR_WIDTH_4_0 (3<<14) |
#define | AA_LINE_REGION_WIDTH_ENABLE (1<<8) |
#define | AA_LINE_REGION_WIDTH_0_5 0 |
#define | AA_LINE_REGION_WIDTH_1_0 (1<<6) |
#define | AA_LINE_REGION_WIDTH_2_0 (2<<6) |
#define | AA_LINE_REGION_WIDTH_4_0 (3<<6) |
#define | _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) |
#define | BFO_ENABLE_STENCIL_REF (1<<23) |
#define | BFO_STENCIL_REF_SHIFT 15 |
#define | BFO_STENCIL_REF_MASK (0xff<<15) |
#define | BFO_ENABLE_STENCIL_FUNCS (1<<14) |
#define | BFO_STENCIL_TEST_SHIFT 11 |
#define | BFO_STENCIL_TEST_MASK (0x7<<11) |
#define | BFO_STENCIL_FAIL_SHIFT 8 |
#define | BFO_STENCIL_FAIL_MASK (0x7<<8) |
#define | BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 |
#define | BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) |
#define | BFO_STENCIL_PASS_Z_PASS_SHIFT 2 |
#define | BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) |
#define | BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) |
#define | BFO_STENCIL_TWO_SIDE (1<<0) |
#define | _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) |
#define | BFM_ENABLE_STENCIL_TEST_MASK (1<<17) |
#define | BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) |
#define | BFM_STENCIL_TEST_MASK_SHIFT 8 |
#define | BFM_STENCIL_TEST_MASK_MASK (0xff<<8) |
#define | BFM_STENCIL_WRITE_MASK_SHIFT 0 |
#define | BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) |
#define | _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) |
#define | BUF_3D_ID_COLOR_BACK (0x3<<24) |
#define | BUF_3D_ID_DEPTH (0x7<<24) |
#define | BUF_3D_USE_FENCE (1<<23) |
#define | BUF_3D_TILED_SURFACE (1<<22) |
#define | BUF_3D_TILE_WALK_X 0 |
#define | BUF_3D_TILE_WALK_Y (1<<21) |
#define | BUF_3D_PITCH(x) (((x)/4)<<2) |
#define | BUF_3D_ADDR(x) ((x) & ~0x3) |
#define | _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) |
#define | CLEARPARAM_CLEAR_RECT (1 << 16) |
#define | CLEARPARAM_ZONE_INIT (0 << 16) |
#define | CLEARPARAM_WRITE_COLOR (1 << 2) |
#define | CLEARPARAM_WRITE_DEPTH (1 << 1) |
#define | CLEARPARAM_WRITE_STENCIL (1 << 0) |
#define | _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) |
#define | _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) |
#define | CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3)) |
#define | _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) |
#define | _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) |
#define | _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) |
#define | _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) |
#define | _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | 0x2) |
#define | _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) |
#define | TEX_DEFAULT_COLOR_OGL (0<<30) |
#define | TEX_DEFAULT_COLOR_D3D (1<<30) |
#define | ZR_EARLY_DEPTH (1<<29) |
#define | LOD_PRECLAMP_OGL (1<<28) |
#define | LOD_PRECLAMP_D3D (0<<28) |
#define | DITHER_FULL_ALWAYS (0<<26) |
#define | DITHER_FULL_ON_FB_BLEND (1<<26) |
#define | DITHER_CLAMPED_ALWAYS (2<<26) |
#define | LINEAR_GAMMA_BLEND_32BPP (1<<25) |
#define | DEBUG_DISABLE_ENH_DITHER (1<<24) |
#define | DSTORG_HORT_BIAS(x) ((x)<<20) |
#define | DSTORG_VERT_BIAS(x) ((x)<<16) |
#define | COLOR_4_2_2_CHNL_WRT_ALL 0 |
#define | COLOR_4_2_2_CHNL_WRT_Y (1<<12) |
#define | COLOR_4_2_2_CHNL_WRT_CR (2<<12) |
#define | COLOR_4_2_2_CHNL_WRT_CB (3<<12) |
#define | COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) |
#define | COLOR_BUF_8BIT 0 |
#define | COLOR_BUF_RGB555 (1<<8) |
#define | COLOR_BUF_RGB565 (2<<8) |
#define | COLOR_BUF_ARGB8888 (3<<8) |
#define | DEPTH_FRMT_16_FIXED 0 |
#define | DEPTH_FRMT_16_FLOAT (1<<2) |
#define | DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) |
#define | VERT_LINE_STRIDE_1 (1<<1) |
#define | VERT_LINE_STRIDE_0 (0<<1) |
#define | VERT_LINE_STRIDE_OFS_1 1 |
#define | VERT_LINE_STRIDE_OFS_0 0 |
#define | _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) |
#define | DRAW_RECT_DIS_DEPTH_OFS (1<<30) |
#define | DRAW_DITHER_OFS_X(x) ((x)<<26) |
#define | DRAW_DITHER_OFS_Y(x) ((x)<<24) |
#define | DRAW_YMIN(x) ((x)<<16) |
#define | DRAW_XMIN(x) (x) |
#define | DRAW_YMAX(x) ((x)<<16) |
#define | DRAW_XMAX(x) (x) |
#define | DRAW_YORG(x) ((x)<<16) |
#define | DRAW_XORG(x) (x) |
#define | _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) |
#define | FOG_COLOR_RED(x) ((x)<<16) |
#define | FOG_COLOR_GREEN(x) ((x)<<8) |
#define | FOG_COLOR_BLUE(x) (x) |
#define | _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) |
#define | FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) |
#define | FMC1_FOGFUNC_VERTEX (0<<28) |
#define | FMC1_FOGFUNC_PIXEL_EXP (1<<28) |
#define | FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) |
#define | FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) |
#define | FMC1_FOGFUNC_MASK (3<<28) |
#define | FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) |
#define | FMC1_FOGINDEX_Z (0<<25) |
#define | FMC1_FOGINDEX_W (1<<25) |
#define | FMC1_C1_C2_MODIFY_ENABLE (1<<24) |
#define | FMC1_DENSITY_MODIFY_ENABLE (1<<23) |
#define | FMC1_C1_ONE (1<<13) |
#define | FMC1_C1_MASK (0xffff<<4) |
#define | FMC2_C2_ONE (1<<16) |
#define | FMC3_D_ONE (1<<16) |
#define | _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) |
#define | IAB_MODIFY_ENABLE (1<<23) |
#define | IAB_ENABLE (1<<22) |
#define | IAB_MODIFY_FUNC (1<<21) |
#define | IAB_FUNC_SHIFT 16 |
#define | IAB_MODIFY_SRC_FACTOR (1<<11) |
#define | IAB_SRC_FACTOR_SHIFT 6 |
#define | IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) |
#define | IAB_MODIFY_DST_FACTOR (1<<5) |
#define | IAB_DST_FACTOR_SHIFT 0 |
#define | IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) |
#define | BLENDFUNC_ADD 0x0 |
#define | BLENDFUNC_SUBTRACT 0x1 |
#define | BLENDFUNC_REVERSE_SUBTRACT 0x2 |
#define | BLENDFUNC_MIN 0x3 |
#define | BLENDFUNC_MAX 0x4 |
#define | BLENDFUNC_MASK 0x7 |
#define | _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) |
#define | LI0_STATE_STATIC_INDIRECT (0x01<<8) |
#define | LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) |
#define | LI0_STATE_SAMPLER (0x04<<8) |
#define | LI0_STATE_MAP (0x08<<8) |
#define | LI0_STATE_PROGRAM (0x10<<8) |
#define | LI0_STATE_CONSTANTS (0x20<<8) |
#define | SIS0_BUFFER_ADDRESS(x) ((x)&~0x3) |
#define | SIS0_FORCE_LOAD (1<<1) |
#define | SIS0_BUFFER_VALID (1<<0) |
#define | SIS1_BUFFER_LENGTH(x) ((x)&0xff) |
#define | DIS0_BUFFER_ADDRESS(x) ((x)&~0x3) |
#define | DIS0_BUFFER_RESET (1<<1) |
#define | DIS0_BUFFER_VALID (1<<0) |
#define | SSB0_BUFFER_ADDRESS(x) ((x)&~0x3) |
#define | SSB0_FORCE_LOAD (1<<1) |
#define | SSB0_BUFFER_VALID (1<<0) |
#define | SSB1_BUFFER_LENGTH(x) ((x)&0xff) |
#define | MSB0_BUFFER_ADDRESS(x) ((x)&~0x3) |
#define | MSB0_FORCE_LOAD (1<<1) |
#define | MSB0_BUFFER_VALID (1<<0) |
#define | MSB1_BUFFER_LENGTH(x) ((x)&0xff) |
#define | PSP0_BUFFER_ADDRESS(x) ((x)&~0x3) |
#define | PSP0_FORCE_LOAD (1<<1) |
#define | PSP0_BUFFER_VALID (1<<0) |
#define | PSP1_BUFFER_LENGTH(x) ((x)&0xff) |
#define | PSC0_BUFFER_ADDRESS(x) ((x)&~0x3) |
#define | PSC0_FORCE_LOAD (1<<1) |
#define | PSC0_BUFFER_VALID (1<<0) |
#define | PSC1_BUFFER_LENGTH(x) ((x)&0xff) |
#define | _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) |
#define | ENABLE_POINT_RASTER_RULE (1<<15) |
#define | OGL_POINT_RASTER_RULE (1<<13) |
#define | ENABLE_TEXKILL_3D_4D (1<<10) |
#define | TEXKILL_3D (0<<9) |
#define | TEXKILL_4D (1<<9) |
#define | ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) |
#define | ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) |
#define | LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) |
#define | TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) |
#define | _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) |
#define | ENABLE_SCISSOR_RECT ((1<<1) | 1) |
#define | DISABLE_SCISSOR_RECT (1<<1) |
#define | _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) |
#define | SCISSOR_RECT_0_YMIN(x) ((x)<<16) |
#define | SCISSOR_RECT_0_XMIN(x) (x) |
#define | SCISSOR_RECT_0_YMAX(x) ((x)<<16) |
#define | SCISSOR_RECT_0_XMAX(x) (x) |
#define | _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) |
#define | I1_LOAD_S(n) (1<<(4+n)) |
#define | S0_VB_OFFSET_MASK 0xffffffc |
#define | S0_AUTO_CACHE_INV_DISABLE (1<<0) |
#define | S1_VERTEX_WIDTH_SHIFT 24 |
#define | S1_VERTEX_WIDTH_MASK (0x3f<<24) |
#define | S1_VERTEX_PITCH_SHIFT 16 |
#define | S1_VERTEX_PITCH_MASK (0x3f<<16) |
#define | TEXCOORDFMT_2D 0x0 |
#define | TEXCOORDFMT_3D 0x1 |
#define | TEXCOORDFMT_4D 0x2 |
#define | TEXCOORDFMT_1D 0x3 |
#define | TEXCOORDFMT_2D_16 0x4 |
#define | TEXCOORDFMT_4D_16 0x5 |
#define | TEXCOORDFMT_NOT_PRESENT 0xf |
#define | S2_TEXCOORD_FMT0_MASK 0xf |
#define | S2_TEXCOORD_FMT1_SHIFT 4 |
#define | S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) |
#define | S2_TEXCOORD_NONE (~0) |
#define | S4_POINT_WIDTH_SHIFT 23 |
#define | S4_POINT_WIDTH_MASK (0x1ff<<23) |
#define | S4_LINE_WIDTH_SHIFT 19 |
#define | S4_LINE_WIDTH_ONE (0x2<<19) |
#define | S4_LINE_WIDTH_MASK (0xf<<19) |
#define | S4_FLATSHADE_ALPHA (1<<18) |
#define | S4_FLATSHADE_FOG (1<<17) |
#define | S4_FLATSHADE_SPECULAR (1<<16) |
#define | S4_FLATSHADE_COLOR (1<<15) |
#define | S4_CULLMODE_BOTH (0<<13) |
#define | S4_CULLMODE_NONE (1<<13) |
#define | S4_CULLMODE_CW (2<<13) |
#define | S4_CULLMODE_CCW (3<<13) |
#define | S4_CULLMODE_MASK (3<<13) |
#define | S4_VFMT_POINT_WIDTH (1<<12) |
#define | S4_VFMT_SPEC_FOG (1<<11) |
#define | S4_VFMT_COLOR (1<<10) |
#define | S4_VFMT_DEPTH_OFFSET (1<<9) |
#define | S4_VFMT_XYZ (1<<6) |
#define | S4_VFMT_XYZW (2<<6) |
#define | S4_VFMT_XY (3<<6) |
#define | S4_VFMT_XYW (4<<6) |
#define | S4_VFMT_XYZW_MASK (7<<6) |
#define | S4_FORCE_DEFAULT_DIFFUSE (1<<5) |
#define | S4_FORCE_DEFAULT_SPECULAR (1<<4) |
#define | S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) |
#define | S4_VFMT_FOG_PARAM (1<<2) |
#define | S4_SPRITE_POINT_ENABLE (1<<1) |
#define | S4_LINE_ANTIALIAS_ENABLE (1<<0) |
#define | S4_VFMT_MASK |
#define | S5_WRITEDISABLE_ALPHA (1<<31) |
#define | S5_WRITEDISABLE_RED (1<<30) |
#define | S5_WRITEDISABLE_GREEN (1<<29) |
#define | S5_WRITEDISABLE_BLUE (1<<28) |
#define | S5_WRITEDISABLE_MASK (0xf<<28) |
#define | S5_FORCE_DEFAULT_POINT_SIZE (1<<27) |
#define | S5_LAST_PIXEL_ENABLE (1<<26) |
#define | S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) |
#define | S5_FOG_ENABLE (1<<24) |
#define | S5_STENCIL_REF_SHIFT 16 |
#define | S5_STENCIL_REF_MASK (0xff<<16) |
#define | S5_STENCIL_TEST_FUNC_SHIFT 13 |
#define | S5_STENCIL_TEST_FUNC_MASK (0x7<<13) |
#define | S5_STENCIL_FAIL_SHIFT 10 |
#define | S5_STENCIL_FAIL_MASK (0x7<<10) |
#define | S5_STENCIL_PASS_Z_FAIL_SHIFT 7 |
#define | S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) |
#define | S5_STENCIL_PASS_Z_PASS_SHIFT 4 |
#define | S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) |
#define | S5_STENCIL_WRITE_ENABLE (1<<3) |
#define | S5_STENCIL_TEST_ENABLE (1<<2) |
#define | S5_COLOR_DITHER_ENABLE (1<<1) |
#define | S5_LOGICOP_ENABLE (1<<0) |
#define | S6_ALPHA_TEST_ENABLE (1<<31) |
#define | S6_ALPHA_TEST_FUNC_SHIFT 28 |
#define | S6_ALPHA_TEST_FUNC_MASK (0x7<<28) |
#define | S6_ALPHA_REF_SHIFT 20 |
#define | S6_ALPHA_REF_MASK (0xff<<20) |
#define | S6_DEPTH_TEST_ENABLE (1<<19) |
#define | S6_DEPTH_TEST_FUNC_SHIFT 16 |
#define | S6_DEPTH_TEST_FUNC_MASK (0x7<<16) |
#define | S6_CBUF_BLEND_ENABLE (1<<15) |
#define | S6_CBUF_BLEND_FUNC_SHIFT 12 |
#define | S6_CBUF_BLEND_FUNC_MASK (0x7<<12) |
#define | S6_CBUF_SRC_BLEND_FACT_SHIFT 8 |
#define | S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) |
#define | S6_CBUF_DST_BLEND_FACT_SHIFT 4 |
#define | S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) |
#define | S6_DEPTH_WRITE_ENABLE (1<<3) |
#define | S6_COLOR_WRITE_ENABLE (1<<2) |
#define | S6_TRISTRIP_PV_SHIFT 0 |
#define | S6_TRISTRIP_PV_MASK (0x3<<0) |
#define | S7_DEPTH_OFFSET_CONST_MASK ~0 |
#define | DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT) |
#define | SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT) |
#define | DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT) |
#define | SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT) |
#define | _3DSTATE_MAP_PALETTE_LOAD_32 (CMD_3D|(0x1d<<24)|(0x8f<<16)) |
#define | _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) |
#define | ENABLE_LOGIC_OP_FUNC (1<<23) |
#define | LOGIC_OP_FUNC(x) ((x)<<18) |
#define | LOGICOP_MASK (0xf<<18) |
#define | MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) |
#define | ENABLE_STENCIL_TEST_MASK (1<<17) |
#define | STENCIL_TEST_MASK(x) (((x)&0xff)<<8) |
#define | MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) |
#define | ENABLE_STENCIL_WRITE_MASK (1<<16) |
#define | STENCIL_WRITE_MASK(x) ((x)&0xff) |
#define | _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) |
#define | PIPELINE_FLUSH_RENDER_CACHE (1<<18) |
#define | PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) |
#define | _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) |
#define | PS1_REG(n) (1<<(n)) |
#define | PS2_CONST_X(n) (n) |
#define | PS3_CONST_Y(n) (n) |
#define | PS4_CONST_Z(n) (n) |
#define | PS5_CONST_W(n) (n) |
#define | I915_MAX_TEX_INDIRECT 4 |
#define | I915_MAX_TEX_INSN 32 |
#define | I915_MAX_ALU_INSN 64 |
#define | I915_MAX_DECL_INSN 27 |
#define | I915_MAX_TEMPORARY 16 |
#define | _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) |
#define | REG_TYPE_R 0 |
#define | REG_TYPE_T 1 |
#define | REG_TYPE_CONST 2 |
#define | REG_TYPE_S 3 |
#define | REG_TYPE_OC 4 |
#define | REG_TYPE_OD 5 |
#define | REG_TYPE_U 6 |
#define | REG_TYPE_MASK 0x7 |
#define | REG_NR_MASK 0xf |
#define | T_TEX0 0 |
#define | T_TEX1 1 |
#define | T_TEX2 2 |
#define | T_TEX3 3 |
#define | T_TEX4 4 |
#define | T_TEX5 5 |
#define | T_TEX6 6 |
#define | T_TEX7 7 |
#define | T_DIFFUSE 8 |
#define | T_SPECULAR 9 |
#define | T_FOG_W 10 |
#define | A0_NOP (0x0<<24) |
#define | A0_ADD (0x1<<24) |
#define | A0_MOV (0x2<<24) |
#define | A0_MUL (0x3<<24) |
#define | A0_MAD (0x4<<24) |
#define | A0_DP2ADD (0x5<<24) |
#define | A0_DP3 (0x6<<24) |
#define | A0_DP4 (0x7<<24) |
#define | A0_FRC (0x8<<24) |
#define | A0_RCP (0x9<<24) |
#define | A0_RSQ (0xa<<24) |
#define | A0_EXP (0xb<<24) |
#define | A0_LOG (0xc<<24) |
#define | A0_CMP (0xd<<24) |
#define | A0_MIN (0xe<<24) |
#define | A0_MAX (0xf<<24) |
#define | A0_FLR (0x10<<24) |
#define | A0_MOD (0x11<<24) |
#define | A0_TRC (0x12<<24) |
#define | A0_SGE (0x13<<24) |
#define | A0_SLT (0x14<<24) |
#define | A0_DEST_SATURATE (1<<22) |
#define | A0_DEST_TYPE_SHIFT 19 |
#define | A0_DEST_NR_SHIFT 14 |
#define | A0_DEST_CHANNEL_X (1<<10) |
#define | A0_DEST_CHANNEL_Y (2<<10) |
#define | A0_DEST_CHANNEL_Z (4<<10) |
#define | A0_DEST_CHANNEL_W (8<<10) |
#define | A0_DEST_CHANNEL_ALL (0xf<<10) |
#define | A0_DEST_CHANNEL_SHIFT 10 |
#define | A0_SRC0_TYPE_SHIFT 7 |
#define | A0_SRC0_NR_SHIFT 2 |
#define | A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) |
#define | A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) |
#define | SRC_X 0 |
#define | SRC_Y 1 |
#define | SRC_Z 2 |
#define | SRC_W 3 |
#define | SRC_ZERO 4 |
#define | SRC_ONE 5 |
#define | A1_SRC0_CHANNEL_X_NEGATE (1<<31) |
#define | A1_SRC0_CHANNEL_X_SHIFT 28 |
#define | A1_SRC0_CHANNEL_Y_NEGATE (1<<27) |
#define | A1_SRC0_CHANNEL_Y_SHIFT 24 |
#define | A1_SRC0_CHANNEL_Z_NEGATE (1<<23) |
#define | A1_SRC0_CHANNEL_Z_SHIFT 20 |
#define | A1_SRC0_CHANNEL_W_NEGATE (1<<19) |
#define | A1_SRC0_CHANNEL_W_SHIFT 16 |
#define | A1_SRC1_TYPE_SHIFT 13 |
#define | A1_SRC1_NR_SHIFT 8 |
#define | A1_SRC1_CHANNEL_X_NEGATE (1<<7) |
#define | A1_SRC1_CHANNEL_X_SHIFT 4 |
#define | A1_SRC1_CHANNEL_Y_NEGATE (1<<3) |
#define | A1_SRC1_CHANNEL_Y_SHIFT 0 |
#define | A2_SRC1_CHANNEL_Z_NEGATE (1<<31) |
#define | A2_SRC1_CHANNEL_Z_SHIFT 28 |
#define | A2_SRC1_CHANNEL_W_NEGATE (1<<27) |
#define | A2_SRC1_CHANNEL_W_SHIFT 24 |
#define | A2_SRC2_TYPE_SHIFT 21 |
#define | A2_SRC2_NR_SHIFT 16 |
#define | A2_SRC2_CHANNEL_X_NEGATE (1<<15) |
#define | A2_SRC2_CHANNEL_X_SHIFT 12 |
#define | A2_SRC2_CHANNEL_Y_NEGATE (1<<11) |
#define | A2_SRC2_CHANNEL_Y_SHIFT 8 |
#define | A2_SRC2_CHANNEL_Z_NEGATE (1<<7) |
#define | A2_SRC2_CHANNEL_Z_SHIFT 4 |
#define | A2_SRC2_CHANNEL_W_NEGATE (1<<3) |
#define | A2_SRC2_CHANNEL_W_SHIFT 0 |
#define | T0_TEXLD (0x15<<24) |
#define | T0_TEXLDP (0x16<<24) |
#define | T0_TEXLDB (0x17<<24) |
#define | T0_TEXKILL (0x18<<24) |
#define | T0_DEST_TYPE_SHIFT 19 |
#define | T0_DEST_NR_SHIFT 14 |
#define | T0_SAMPLER_NR_SHIFT 0 |
#define | T0_SAMPLER_NR_MASK (0xf<<0) |
#define | T1_ADDRESS_REG_TYPE_SHIFT 24 |
#define | T1_ADDRESS_REG_NR_SHIFT 17 |
#define | T2_MBZ 0 |
#define | D0_DCL (0x19<<24) |
#define | D0_SAMPLE_TYPE_SHIFT 22 |
#define | D0_SAMPLE_TYPE_2D (0x0<<22) |
#define | D0_SAMPLE_TYPE_CUBE (0x1<<22) |
#define | D0_SAMPLE_TYPE_VOLUME (0x2<<22) |
#define | D0_SAMPLE_TYPE_MASK (0x3<<22) |
#define | D0_TYPE_SHIFT 19 |
#define | D0_NR_SHIFT 14 |
#define | D0_CHANNEL_X (1<<10) |
#define | D0_CHANNEL_Y (2<<10) |
#define | D0_CHANNEL_Z (4<<10) |
#define | D0_CHANNEL_W (8<<10) |
#define | D0_CHANNEL_ALL (0xf<<10) |
#define | D0_CHANNEL_NONE (0<<10) |
#define | D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) |
#define | D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) |
#define | D1_MBZ 0 |
#define | D2_MBZ 0 |
#define | _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) |
#define | MS1_MAPMASK_SHIFT 0 |
#define | MS1_MAPMASK_MASK (0x8fff<<0) |
#define | MS2_UNTRUSTED_SURFACE (1<<31) |
#define | MS2_ADDRESS_MASK 0xfffffffc |
#define | MS2_VERTICAL_LINE_STRIDE (1<<1) |
#define | MS2_VERTICAL_OFFSET (1<<1) |
#define | MS3_HEIGHT_SHIFT 21 |
#define | MS3_WIDTH_SHIFT 10 |
#define | MS3_PALETTE_SELECT (1<<9) |
#define | MS3_MAPSURF_FORMAT_SHIFT 7 |
#define | MS3_MAPSURF_FORMAT_MASK (0x7<<7) |
#define | MAPSURF_8BIT (1<<7) |
#define | MAPSURF_16BIT (2<<7) |
#define | MAPSURF_32BIT (3<<7) |
#define | MAPSURF_422 (5<<7) |
#define | MAPSURF_COMPRESSED (6<<7) |
#define | MAPSURF_4BIT_INDEXED (7<<7) |
#define | MS3_MT_FORMAT_MASK (0x7 << 3) |
#define | MS3_MT_FORMAT_SHIFT 3 |
#define | MT_4BIT_IDX_ARGB8888 (7<<3) |
#define | MT_8BIT_I8 (0<<3) |
#define | MT_8BIT_L8 (1<<3) |
#define | MT_8BIT_A8 (4<<3) |
#define | MT_8BIT_MONO8 (5<<3) |
#define | MT_16BIT_RGB565 (0<<3) |
#define | MT_16BIT_ARGB1555 (1<<3) |
#define | MT_16BIT_ARGB4444 (2<<3) |
#define | MT_16BIT_AY88 (3<<3) |
#define | MT_16BIT_88DVDU (5<<3) |
#define | MT_16BIT_BUMP_655LDVDU (6<<3) |
#define | MT_16BIT_I16 (7<<3) |
#define | MT_16BIT_L16 (8<<3) |
#define | MT_16BIT_A16 (9<<3) |
#define | MT_32BIT_ARGB8888 (0<<3) |
#define | MT_32BIT_ABGR8888 (1<<3) |
#define | MT_32BIT_XRGB8888 (2<<3) |
#define | MT_32BIT_XBGR8888 (3<<3) |
#define | MT_32BIT_QWVU8888 (4<<3) |
#define | MT_32BIT_AXVU8888 (5<<3) |
#define | MT_32BIT_LXVU8888 (6<<3) |
#define | MT_32BIT_XLVU8888 (7<<3) |
#define | MT_32BIT_ARGB2101010 (8<<3) |
#define | MT_32BIT_ABGR2101010 (9<<3) |
#define | MT_32BIT_AWVU2101010 (0xA<<3) |
#define | MT_32BIT_GR1616 (0xB<<3) |
#define | MT_32BIT_VU1616 (0xC<<3) |
#define | MT_32BIT_xI824 (0xD<<3) |
#define | MT_32BIT_xA824 (0xE<<3) |
#define | MT_32BIT_xL824 (0xF<<3) |
#define | MT_422_YCRCB_SWAPY (0<<3) |
#define | MT_422_YCRCB_NORMAL (1<<3) |
#define | MT_422_YCRCB_SWAPUV (2<<3) |
#define | MT_422_YCRCB_SWAPUVY (3<<3) |
#define | MT_COMPRESS_DXT1 (0<<3) |
#define | MT_COMPRESS_DXT2_3 (1<<3) |
#define | MT_COMPRESS_DXT4_5 (2<<3) |
#define | MT_COMPRESS_FXT1 (3<<3) |
#define | MT_COMPRESS_DXT1_RGB (4<<3) |
#define | MS3_USE_FENCE_REGS (1<<2) |
#define | MS3_TILED_SURFACE (1<<1) |
#define | MS3_TILE_WALK (1<<0) |
#define | MS4_PITCH_SHIFT 21 |
#define | MS4_CUBE_FACE_ENA_NEGX (1<<20) |
#define | MS4_CUBE_FACE_ENA_POSX (1<<19) |
#define | MS4_CUBE_FACE_ENA_NEGY (1<<18) |
#define | MS4_CUBE_FACE_ENA_POSY (1<<17) |
#define | MS4_CUBE_FACE_ENA_NEGZ (1<<16) |
#define | MS4_CUBE_FACE_ENA_POSZ (1<<15) |
#define | MS4_CUBE_FACE_ENA_MASK (0x3f<<15) |
#define | MS4_MAX_LOD_SHIFT 9 |
#define | MS4_MAX_LOD_MASK (0x3f<<9) |
#define | MS4_MIP_LAYOUT_LEGACY (0<<8) |
#define | MS4_MIP_LAYOUT_BELOW_LPT (0<<8) |
#define | MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) |
#define | MS4_VOLUME_DEPTH_SHIFT 0 |
#define | MS4_VOLUME_DEPTH_MASK (0xff<<0) |
#define | _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) |
#define | SS1_MAPMASK_SHIFT 0 |
#define | SS1_MAPMASK_MASK (0x8fff<<0) |
#define | SS2_REVERSE_GAMMA_ENABLE (1<<31) |
#define | SS2_PACKED_TO_PLANAR_ENABLE (1<<30) |
#define | SS2_COLORSPACE_CONVERSION (1<<29) |
#define | SS2_CHROMAKEY_SHIFT 27 |
#define | SS2_BASE_MIP_LEVEL_SHIFT 22 |
#define | SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) |
#define | SS2_MIP_FILTER_SHIFT 20 |
#define | SS2_MIP_FILTER_MASK (0x3<<20) |
#define | MIPFILTER_NONE 0 |
#define | MIPFILTER_NEAREST 1 |
#define | MIPFILTER_LINEAR 3 |
#define | SS2_MAG_FILTER_SHIFT 17 |
#define | SS2_MAG_FILTER_MASK (0x7<<17) |
#define | FILTER_NEAREST 0 |
#define | FILTER_LINEAR 1 |
#define | FILTER_ANISOTROPIC 2 |
#define | FILTER_4X4_1 3 |
#define | FILTER_4X4_2 4 |
#define | FILTER_4X4_FLAT 5 |
#define | FILTER_6X5_MONO 6 |
#define | SS2_MIN_FILTER_SHIFT 14 |
#define | SS2_MIN_FILTER_MASK (0x7<<14) |
#define | SS2_LOD_BIAS_SHIFT 5 |
#define | SS2_LOD_BIAS_ONE (0x10<<5) |
#define | SS2_LOD_BIAS_MASK (0x1ff<<5) |
#define | SS2_SHADOW_ENABLE (1<<4) |
#define | SS2_MAX_ANISO_MASK (1<<3) |
#define | SS2_MAX_ANISO_2 (0<<3) |
#define | SS2_MAX_ANISO_4 (1<<3) |
#define | SS2_SHADOW_FUNC_SHIFT 0 |
#define | SS2_SHADOW_FUNC_MASK (0x7<<0) |
#define | SS3_MIN_LOD_SHIFT 24 |
#define | SS3_MIN_LOD_ONE (0x10<<24) |
#define | SS3_MIN_LOD_MASK (0xff<<24) |
#define | SS3_KILL_PIXEL_ENABLE (1<<17) |
#define | SS3_TCX_ADDR_MODE_SHIFT 12 |
#define | SS3_TCX_ADDR_MODE_MASK (0x7<<12) |
#define | TEXCOORDMODE_WRAP 0 |
#define | TEXCOORDMODE_MIRROR 1 |
#define | TEXCOORDMODE_CLAMP_EDGE 2 |
#define | TEXCOORDMODE_CUBE 3 |
#define | TEXCOORDMODE_CLAMP_BORDER 4 |
#define | TEXCOORDMODE_MIRROR_ONCE 5 |
#define | SS3_TCY_ADDR_MODE_SHIFT 9 |
#define | SS3_TCY_ADDR_MODE_MASK (0x7<<9) |
#define | SS3_TCZ_ADDR_MODE_SHIFT 6 |
#define | SS3_TCZ_ADDR_MODE_MASK (0x7<<6) |
#define | SS3_NORMALIZED_COORDS (1<<5) |
#define | SS3_TEXTUREMAP_INDEX_SHIFT 1 |
#define | SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) |
#define | SS3_DEINTERLACER_ENABLE (1<<0) |
#define | SS4_BORDER_COLOR_MASK (~0) |
#define | _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) |
#define | ST1_ENABLE (1<<16) |
#define | ST1_MASK (0xffff) |
#define | _3DSTATE_DEFAULT_Z ((0x3<<29)|(0x1d<<24)|(0x98<<16)) |
#define | _3DSTATE_DEFAULT_DIFFUSE ((0x3<<29)|(0x1d<<24)|(0x99<<16)) |
#define | _3DSTATE_DEFAULT_SPECULAR ((0x3<<29)|(0x1d<<24)|(0x9a<<16)) |
#define | MI_FLUSH ((0<<29)|(4<<23)) |
#define | FLUSH_MAP_CACHE (1<<0) |
#define | INHIBIT_FLUSH_RENDER_CACHE (1<<2) |
#define | CMD_3D (0x3<<29) |
#define | _3DPRIMITIVE ((0x3<<29)|(0x1f<<24)) |
#define | PRIM_INDIRECT (1<<23) |
#define | PRIM_INLINE (0<<23) |
#define | PRIM_INDIRECT_SEQUENTIAL (0<<17) |
#define | PRIM_INDIRECT_ELTS (1<<17) |
#define | PRIM3D_TRILIST (0x0<<18) |
#define | PRIM3D_TRISTRIP (0x1<<18) |
#define | PRIM3D_TRISTRIP_RVRSE (0x2<<18) |
#define | PRIM3D_TRIFAN (0x3<<18) |
#define | PRIM3D_POLY (0x4<<18) |
#define | PRIM3D_LINELIST (0x5<<18) |
#define | PRIM3D_LINESTRIP (0x6<<18) |
#define | PRIM3D_RECTLIST (0x7<<18) |
#define | PRIM3D_POINTLIST (0x8<<18) |
#define | PRIM3D_DIB (0x9<<18) |
#define | PRIM3D_MASK (0x1f<<18) |
#define | I915PACKCOLOR4444(r, g, b, a) ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) |
#define | I915PACKCOLOR1555(r, g, b, a) |
#define | I915PACKCOLOR565(r, g, b) ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) |
#define | I915PACKCOLOR8888(r, g, b, a) ((a<<24) | (r<<16) | (g<<8) | b) |
#define | BR00_BITBLT_CLIENT 0x40000000 |
#define | BR00_OP_COLOR_BLT 0x10000000 |
#define | BR00_OP_SRC_COPY_BLT 0x10C00000 |
#define | BR13_SOLID_PATTERN 0x80000000 |
#define | XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|0x4) |
#define | XY_COLOR_BLT_WRITE_ALPHA (1<<21) |
#define | XY_COLOR_BLT_WRITE_RGB (1<<20) |
#define | XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) |
#define | XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) |
#define | XY_SRC_COPY_BLT_WRITE_RGB (1<<20) |
#define | MI_WAIT_FOR_EVENT ((0x3<<23)) |
#define | MI_WAIT_FOR_PLANE_B_FLIP (1<<6) |
#define | MI_WAIT_FOR_PLANE_A_FLIP (1<<2) |
#define | MI_BATCH_BUFFER (0x30<<23) |
#define | MI_BATCH_BUFFER_START (0x31<<23) |
#define | MI_BATCH_BUFFER_END (0xa<<23) |
#define | COMPAREFUNC_ALWAYS 0 |
#define | COMPAREFUNC_NEVER 0x1 |
#define | COMPAREFUNC_LESS 0x2 |
#define | COMPAREFUNC_EQUAL 0x3 |
#define | COMPAREFUNC_LEQUAL 0x4 |
#define | COMPAREFUNC_GREATER 0x5 |
#define | COMPAREFUNC_NOTEQUAL 0x6 |
#define | COMPAREFUNC_GEQUAL 0x7 |
#define | STENCILOP_KEEP 0 |
#define | STENCILOP_ZERO 0x1 |
#define | STENCILOP_REPLACE 0x2 |
#define | STENCILOP_INCRSAT 0x3 |
#define | STENCILOP_DECRSAT 0x4 |
#define | STENCILOP_INCR 0x5 |
#define | STENCILOP_DECR 0x6 |
#define | STENCILOP_INVERT 0x7 |
#define | LOGICOP_CLEAR 0 |
#define | LOGICOP_NOR 0x1 |
#define | LOGICOP_AND_INV 0x2 |
#define | LOGICOP_COPY_INV 0x3 |
#define | LOGICOP_AND_RVRSE 0x4 |
#define | LOGICOP_INV 0x5 |
#define | LOGICOP_XOR 0x6 |
#define | LOGICOP_NAND 0x7 |
#define | LOGICOP_AND 0x8 |
#define | LOGICOP_EQUIV 0x9 |
#define | LOGICOP_NOOP 0xa |
#define | LOGICOP_OR_INV 0xb |
#define | LOGICOP_COPY 0xc |
#define | LOGICOP_OR_RVRSE 0xd |
#define | LOGICOP_OR 0xe |
#define | LOGICOP_SET 0xf |
#define | BLENDFACT_ZERO 0x01 |
#define | BLENDFACT_ONE 0x02 |
#define | BLENDFACT_SRC_COLR 0x03 |
#define | BLENDFACT_INV_SRC_COLR 0x04 |
#define | BLENDFACT_SRC_ALPHA 0x05 |
#define | BLENDFACT_INV_SRC_ALPHA 0x06 |
#define | BLENDFACT_DST_ALPHA 0x07 |
#define | BLENDFACT_INV_DST_ALPHA 0x08 |
#define | BLENDFACT_DST_COLR 0x09 |
#define | BLENDFACT_INV_DST_COLR 0x0a |
#define | BLENDFACT_SRC_ALPHA_SATURATE 0x0b |
#define | BLENDFACT_CONST_COLOR 0x0c |
#define | BLENDFACT_INV_CONST_COLOR 0x0d |
#define | BLENDFACT_CONST_ALPHA 0x0e |
#define | BLENDFACT_INV_CONST_ALPHA 0x0f |
#define | BLENDFACT_MASK 0x0f |
#define | PCI_CHIP_I915_G 0x2582 |
#define | PCI_CHIP_I915_GM 0x2592 |
#define | PCI_CHIP_I945_G 0x2772 |
#define | PCI_CHIP_I945_GM 0x27A2 |
#define | PCI_CHIP_I945_GME 0x27AE |
#define | PCI_CHIP_G33_G 0x29C2 |
#define | PCI_CHIP_Q35_G 0x29B2 |
#define | PCI_CHIP_Q33_G 0x29D2 |
#define _3DPRIMITIVE ((0x3<<29)|(0x1f<<24)) |
Definition at line 859 of file i915_reg.h.
#define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) |
Definition at line 53 of file i915_reg.h.
#define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) |
Definition at line 84 of file i915_reg.h.
#define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) |
Definition at line 66 of file i915_reg.h.
#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) |
Definition at line 97 of file i915_reg.h.
#define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) |
Definition at line 113 of file i915_reg.h.
#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) |
Definition at line 122 of file i915_reg.h.
#define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) |
Definition at line 127 of file i915_reg.h.
#define _3DSTATE_DEFAULT_DIFFUSE ((0x3<<29)|(0x1d<<24)|(0x99<<16)) |
Definition at line 847 of file i915_reg.h.
#define _3DSTATE_DEFAULT_SPECULAR ((0x3<<29)|(0x1d<<24)|(0x9a<<16)) |
Definition at line 848 of file i915_reg.h.
#define _3DSTATE_DEFAULT_Z ((0x3<<29)|(0x1d<<24)|(0x98<<16)) |
Definition at line 846 of file i915_reg.h.
#define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) |
Definition at line 141 of file i915_reg.h.
#define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | 0x2) |
Definition at line 146 of file i915_reg.h.
#define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) |
Definition at line 131 of file i915_reg.h.
#define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) |
Definition at line 134 of file i915_reg.h.
#define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) |
Definition at line 137 of file i915_reg.h.
#define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) |
Definition at line 181 of file i915_reg.h.
#define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) |
Definition at line 149 of file i915_reg.h.
#define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) |
Definition at line 203 of file i915_reg.h.
#define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) |
Definition at line 209 of file i915_reg.h.
#define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) |
Definition at line 232 of file i915_reg.h.
#define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) |
Definition at line 254 of file i915_reg.h.
#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) |
Definition at line 322 of file i915_reg.h.
#define _3DSTATE_MAP_PALETTE_LOAD_32 (CMD_3D|(0x1d<<24)|(0x8f<<16)) |
Definition at line 445 of file i915_reg.h.
#define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) |
Definition at line 692 of file i915_reg.h.
#define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) |
Definition at line 449 of file i915_reg.h.
#define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) |
Definition at line 461 of file i915_reg.h.
#define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) |
Definition at line 467 of file i915_reg.h.
#define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) |
Definition at line 488 of file i915_reg.h.
#define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) |
Definition at line 296 of file i915_reg.h.
#define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) |
Definition at line 775 of file i915_reg.h.
#define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) |
Definition at line 308 of file i915_reg.h.
#define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) |
Definition at line 313 of file i915_reg.h.
#define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) |
Definition at line 842 of file i915_reg.h.
#define A0_ADD (0x1<<24) |
Definition at line 541 of file i915_reg.h.
#define A0_CMP (0xd<<24) |
Definition at line 553 of file i915_reg.h.
#define A0_DEST_CHANNEL_ALL (0xf<<10) |
Definition at line 570 of file i915_reg.h.
#define A0_DEST_CHANNEL_SHIFT 10 |
Definition at line 571 of file i915_reg.h.
#define A0_DEST_CHANNEL_W (8<<10) |
Definition at line 569 of file i915_reg.h.
#define A0_DEST_CHANNEL_X (1<<10) |
Definition at line 566 of file i915_reg.h.
#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) |
Definition at line 575 of file i915_reg.h.
#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) |
Definition at line 576 of file i915_reg.h.
#define A0_DEST_CHANNEL_Y (2<<10) |
Definition at line 567 of file i915_reg.h.
#define A0_DEST_CHANNEL_Z (4<<10) |
Definition at line 568 of file i915_reg.h.
#define A0_DEST_NR_SHIFT 14 |
Definition at line 564 of file i915_reg.h.
#define A0_DEST_SATURATE (1<<22) |
Definition at line 561 of file i915_reg.h.
#define A0_DEST_TYPE_SHIFT 19 |
Definition at line 562 of file i915_reg.h.
#define A0_DP2ADD (0x5<<24) |
Definition at line 545 of file i915_reg.h.
#define A0_DP3 (0x6<<24) |
Definition at line 546 of file i915_reg.h.
#define A0_DP4 (0x7<<24) |
Definition at line 547 of file i915_reg.h.
#define A0_EXP (0xb<<24) |
Definition at line 551 of file i915_reg.h.
#define A0_FLR (0x10<<24) |
Definition at line 556 of file i915_reg.h.
#define A0_FRC (0x8<<24) |
Definition at line 548 of file i915_reg.h.
#define A0_LOG (0xc<<24) |
Definition at line 552 of file i915_reg.h.
#define A0_MAD (0x4<<24) |
Definition at line 544 of file i915_reg.h.
#define A0_MAX (0xf<<24) |
Definition at line 555 of file i915_reg.h.
#define A0_MIN (0xe<<24) |
Definition at line 554 of file i915_reg.h.
#define A0_MOD (0x11<<24) |
Definition at line 557 of file i915_reg.h.
#define A0_MOV (0x2<<24) |
Definition at line 542 of file i915_reg.h.
#define A0_MUL (0x3<<24) |
Definition at line 543 of file i915_reg.h.
#define A0_NOP (0x0<<24) |
Definition at line 540 of file i915_reg.h.
#define A0_RCP (0x9<<24) |
Definition at line 549 of file i915_reg.h.
#define A0_RSQ (0xa<<24) |
Definition at line 550 of file i915_reg.h.
#define A0_SGE (0x13<<24) |
Definition at line 559 of file i915_reg.h.
#define A0_SLT (0x14<<24) |
Definition at line 560 of file i915_reg.h.
#define A0_SRC0_NR_SHIFT 2 |
Definition at line 573 of file i915_reg.h.
#define A0_SRC0_TYPE_SHIFT 7 |
Definition at line 572 of file i915_reg.h.
#define A0_TRC (0x12<<24) |
Definition at line 558 of file i915_reg.h.
#define A1_SRC0_CHANNEL_W_NEGATE (1<<19) |
Definition at line 592 of file i915_reg.h.
#define A1_SRC0_CHANNEL_W_SHIFT 16 |
Definition at line 593 of file i915_reg.h.
#define A1_SRC0_CHANNEL_X_NEGATE (1<<31) |
Definition at line 586 of file i915_reg.h.
#define A1_SRC0_CHANNEL_X_SHIFT 28 |
Definition at line 587 of file i915_reg.h.
#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) |
Definition at line 588 of file i915_reg.h.
#define A1_SRC0_CHANNEL_Y_SHIFT 24 |
Definition at line 589 of file i915_reg.h.
#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) |
Definition at line 590 of file i915_reg.h.
#define A1_SRC0_CHANNEL_Z_SHIFT 20 |
Definition at line 591 of file i915_reg.h.
#define A1_SRC1_CHANNEL_X_NEGATE (1<<7) |
Definition at line 596 of file i915_reg.h.
#define A1_SRC1_CHANNEL_X_SHIFT 4 |
Definition at line 597 of file i915_reg.h.
#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) |
Definition at line 598 of file i915_reg.h.
#define A1_SRC1_CHANNEL_Y_SHIFT 0 |
Definition at line 599 of file i915_reg.h.
#define A1_SRC1_NR_SHIFT 8 |
Definition at line 595 of file i915_reg.h.
#define A1_SRC1_TYPE_SHIFT 13 |
Definition at line 594 of file i915_reg.h.
#define A2_SRC1_CHANNEL_W_NEGATE (1<<27) |
Definition at line 603 of file i915_reg.h.
#define A2_SRC1_CHANNEL_W_SHIFT 24 |
Definition at line 604 of file i915_reg.h.
#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) |
Definition at line 601 of file i915_reg.h.
#define A2_SRC1_CHANNEL_Z_SHIFT 28 |
Definition at line 602 of file i915_reg.h.
#define A2_SRC2_CHANNEL_W_NEGATE (1<<3) |
Definition at line 613 of file i915_reg.h.
#define A2_SRC2_CHANNEL_W_SHIFT 0 |
Definition at line 614 of file i915_reg.h.
#define A2_SRC2_CHANNEL_X_NEGATE (1<<15) |
Definition at line 607 of file i915_reg.h.
#define A2_SRC2_CHANNEL_X_SHIFT 12 |
Definition at line 608 of file i915_reg.h.
#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) |
Definition at line 609 of file i915_reg.h.
#define A2_SRC2_CHANNEL_Y_SHIFT 8 |
Definition at line 610 of file i915_reg.h.
#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) |
Definition at line 611 of file i915_reg.h.
#define A2_SRC2_CHANNEL_Z_SHIFT 4 |
Definition at line 612 of file i915_reg.h.
#define A2_SRC2_NR_SHIFT 16 |
Definition at line 606 of file i915_reg.h.
#define A2_SRC2_TYPE_SHIFT 21 |
Definition at line 605 of file i915_reg.h.
#define AA_LINE_ECAAR_WIDTH_0_5 0 |
Definition at line 55 of file i915_reg.h.
#define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) |
Definition at line 56 of file i915_reg.h.
#define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) |
Definition at line 57 of file i915_reg.h.
#define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) |
Definition at line 58 of file i915_reg.h.
#define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) |
Definition at line 54 of file i915_reg.h.
#define AA_LINE_REGION_WIDTH_0_5 0 |
Definition at line 60 of file i915_reg.h.
#define AA_LINE_REGION_WIDTH_1_0 (1<<6) |
Definition at line 61 of file i915_reg.h.
#define AA_LINE_REGION_WIDTH_2_0 (2<<6) |
Definition at line 62 of file i915_reg.h.
#define AA_LINE_REGION_WIDTH_4_0 (3<<6) |
Definition at line 63 of file i915_reg.h.
#define AA_LINE_REGION_WIDTH_ENABLE (1<<8) |
Definition at line 59 of file i915_reg.h.
#define BFM_ENABLE_STENCIL_TEST_MASK (1<<17) |
Definition at line 85 of file i915_reg.h.
#define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) |
Definition at line 86 of file i915_reg.h.
#define BFM_STENCIL_TEST_MASK_MASK (0xff<<8) |
Definition at line 88 of file i915_reg.h.
#define BFM_STENCIL_TEST_MASK_SHIFT 8 |
Definition at line 87 of file i915_reg.h.
#define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) |
Definition at line 90 of file i915_reg.h.
#define BFM_STENCIL_WRITE_MASK_SHIFT 0 |
Definition at line 89 of file i915_reg.h.
#define BFO_ENABLE_STENCIL_FUNCS (1<<14) |
Definition at line 70 of file i915_reg.h.
#define BFO_ENABLE_STENCIL_REF (1<<23) |
Definition at line 67 of file i915_reg.h.
#define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) |
Definition at line 79 of file i915_reg.h.
#define BFO_STENCIL_FAIL_MASK (0x7<<8) |
Definition at line 74 of file i915_reg.h.
#define BFO_STENCIL_FAIL_SHIFT 8 |
Definition at line 73 of file i915_reg.h.
#define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) |
Definition at line 76 of file i915_reg.h.
#define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 |
Definition at line 75 of file i915_reg.h.
#define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) |
Definition at line 78 of file i915_reg.h.
#define BFO_STENCIL_PASS_Z_PASS_SHIFT 2 |
Definition at line 77 of file i915_reg.h.
#define BFO_STENCIL_REF_MASK (0xff<<15) |
Definition at line 69 of file i915_reg.h.
#define BFO_STENCIL_REF_SHIFT 15 |
Definition at line 68 of file i915_reg.h.
#define BFO_STENCIL_TEST_MASK (0x7<<11) |
Definition at line 72 of file i915_reg.h.
#define BFO_STENCIL_TEST_SHIFT 11 |
Definition at line 71 of file i915_reg.h.
#define BFO_STENCIL_TWO_SIDE (1<<0) |
Definition at line 80 of file i915_reg.h.
#define BLENDFACT_CONST_ALPHA 0x0e |
Definition at line 964 of file i915_reg.h.
#define BLENDFACT_CONST_COLOR 0x0c |
Definition at line 962 of file i915_reg.h.
#define BLENDFACT_DST_ALPHA 0x07 |
Definition at line 957 of file i915_reg.h.
#define BLENDFACT_DST_COLR 0x09 |
Definition at line 959 of file i915_reg.h.
#define BLENDFACT_INV_CONST_ALPHA 0x0f |
Definition at line 965 of file i915_reg.h.
#define BLENDFACT_INV_CONST_COLOR 0x0d |
Definition at line 963 of file i915_reg.h.
#define BLENDFACT_INV_DST_ALPHA 0x08 |
Definition at line 958 of file i915_reg.h.
#define BLENDFACT_INV_DST_COLR 0x0a |
Definition at line 960 of file i915_reg.h.
#define BLENDFACT_INV_SRC_ALPHA 0x06 |
Definition at line 956 of file i915_reg.h.
#define BLENDFACT_INV_SRC_COLR 0x04 |
Definition at line 954 of file i915_reg.h.
#define BLENDFACT_MASK 0x0f |
Definition at line 966 of file i915_reg.h.
#define BLENDFACT_ONE 0x02 |
Definition at line 952 of file i915_reg.h.
#define BLENDFACT_SRC_ALPHA 0x05 |
Definition at line 955 of file i915_reg.h.
#define BLENDFACT_SRC_ALPHA_SATURATE 0x0b |
Definition at line 961 of file i915_reg.h.
#define BLENDFACT_SRC_COLR 0x03 |
Definition at line 953 of file i915_reg.h.
#define BLENDFACT_ZERO 0x01 |
Definition at line 951 of file i915_reg.h.
#define BLENDFUNC_ADD 0x0 |
Definition at line 245 of file i915_reg.h.
#define BLENDFUNC_MASK 0x7 |
Definition at line 250 of file i915_reg.h.
#define BLENDFUNC_MAX 0x4 |
Definition at line 249 of file i915_reg.h.
#define BLENDFUNC_MIN 0x3 |
Definition at line 248 of file i915_reg.h.
#define BLENDFUNC_REVERSE_SUBTRACT 0x2 |
Definition at line 247 of file i915_reg.h.
#define BLENDFUNC_SUBTRACT 0x1 |
Definition at line 246 of file i915_reg.h.
#define BR00_BITBLT_CLIENT 0x40000000 |
Definition at line 893 of file i915_reg.h.
#define BR00_OP_COLOR_BLT 0x10000000 |
Definition at line 894 of file i915_reg.h.
#define BR00_OP_SRC_COPY_BLT 0x10C00000 |
Definition at line 895 of file i915_reg.h.
#define BR13_SOLID_PATTERN 0x80000000 |
Definition at line 896 of file i915_reg.h.
#define BUF_3D_ADDR | ( | x | ) | ((x) & ~0x3) |
Definition at line 107 of file i915_reg.h.
#define BUF_3D_ID_COLOR_BACK (0x3<<24) |
Definition at line 99 of file i915_reg.h.
#define BUF_3D_ID_DEPTH (0x7<<24) |
Definition at line 100 of file i915_reg.h.
#define BUF_3D_PITCH | ( | x | ) | (((x)/4)<<2) |
Definition at line 105 of file i915_reg.h.
#define BUF_3D_TILE_WALK_X 0 |
Definition at line 103 of file i915_reg.h.
#define BUF_3D_TILE_WALK_Y (1<<21) |
Definition at line 104 of file i915_reg.h.
#define BUF_3D_TILED_SURFACE (1<<22) |
Definition at line 102 of file i915_reg.h.
#define BUF_3D_USE_FENCE (1<<23) |
Definition at line 101 of file i915_reg.h.
#define CLEARPARAM_CLEAR_RECT (1 << 16) |
Definition at line 115 of file i915_reg.h.
#define CLEARPARAM_WRITE_COLOR (1 << 2) |
Definition at line 117 of file i915_reg.h.
#define CLEARPARAM_WRITE_DEPTH (1 << 1) |
Definition at line 118 of file i915_reg.h.
#define CLEARPARAM_WRITE_STENCIL (1 << 0) |
Definition at line 119 of file i915_reg.h.
#define CLEARPARAM_ZONE_INIT (0 << 16) |
Definition at line 116 of file i915_reg.h.
#define CMD_3D (0x3<<29) |
Definition at line 856 of file i915_reg.h.
#define CMD_3D (0x3<<29) |
Definition at line 856 of file i915_reg.h.
#define COLOR_4_2_2_CHNL_WRT_ALL 0 |
Definition at line 163 of file i915_reg.h.
#define COLOR_4_2_2_CHNL_WRT_CB (3<<12) |
Definition at line 166 of file i915_reg.h.
#define COLOR_4_2_2_CHNL_WRT_CR (2<<12) |
Definition at line 165 of file i915_reg.h.
#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) |
Definition at line 167 of file i915_reg.h.
#define COLOR_4_2_2_CHNL_WRT_Y (1<<12) |
Definition at line 164 of file i915_reg.h.
#define COLOR_BUF_8BIT 0 |
Definition at line 168 of file i915_reg.h.
#define COLOR_BUF_ARGB8888 (3<<8) |
Definition at line 171 of file i915_reg.h.
#define COLOR_BUF_RGB555 (1<<8) |
Definition at line 169 of file i915_reg.h.
#define COLOR_BUF_RGB565 (2<<8) |
Definition at line 170 of file i915_reg.h.
#define COMPAREFUNC_ALWAYS 0 |
Definition at line 916 of file i915_reg.h.
#define COMPAREFUNC_EQUAL 0x3 |
Definition at line 919 of file i915_reg.h.
#define COMPAREFUNC_GEQUAL 0x7 |
Definition at line 923 of file i915_reg.h.
#define COMPAREFUNC_GREATER 0x5 |
Definition at line 921 of file i915_reg.h.
#define COMPAREFUNC_LEQUAL 0x4 |
Definition at line 920 of file i915_reg.h.
#define COMPAREFUNC_LESS 0x2 |
Definition at line 918 of file i915_reg.h.
#define COMPAREFUNC_NEVER 0x1 |
Definition at line 917 of file i915_reg.h.
#define COMPAREFUNC_NOTEQUAL 0x6 |
Definition at line 922 of file i915_reg.h.
#define CSB_TCB | ( | iunit, | |||
eunit | ) | ((eunit)<<(iunit*3)) |
Definition at line 128 of file i915_reg.h.
#define D0_CHANNEL_ALL (0xf<<10) |
Definition at line 673 of file i915_reg.h.
#define D0_CHANNEL_NONE (0<<10) |
Definition at line 674 of file i915_reg.h.
#define D0_CHANNEL_W (8<<10) |
Definition at line 672 of file i915_reg.h.
#define D0_CHANNEL_X (1<<10) |
Definition at line 669 of file i915_reg.h.
#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) |
Definition at line 676 of file i915_reg.h.
#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) |
Definition at line 677 of file i915_reg.h.
#define D0_CHANNEL_Y (2<<10) |
Definition at line 670 of file i915_reg.h.
#define D0_CHANNEL_Z (4<<10) |
Definition at line 671 of file i915_reg.h.
#define D0_DCL (0x19<<24) |
Definition at line 656 of file i915_reg.h.
#define D0_NR_SHIFT 14 |
Definition at line 667 of file i915_reg.h.
#define D0_SAMPLE_TYPE_2D (0x0<<22) |
Definition at line 660 of file i915_reg.h.
#define D0_SAMPLE_TYPE_CUBE (0x1<<22) |
Definition at line 661 of file i915_reg.h.
#define D0_SAMPLE_TYPE_MASK (0x3<<22) |
Definition at line 663 of file i915_reg.h.
#define D0_SAMPLE_TYPE_SHIFT 22 |
Definition at line 659 of file i915_reg.h.
#define D0_SAMPLE_TYPE_VOLUME (0x2<<22) |
Definition at line 662 of file i915_reg.h.
#define D0_TYPE_SHIFT 19 |
Definition at line 665 of file i915_reg.h.
#define D1_MBZ 0 |
Definition at line 686 of file i915_reg.h.
#define D2_MBZ 0 |
Definition at line 687 of file i915_reg.h.
#define DEBUG_DISABLE_ENH_DITHER (1<<24) |
Definition at line 160 of file i915_reg.h.
#define DEPTH_FRMT_16_FIXED 0 |
Definition at line 172 of file i915_reg.h.
#define DEPTH_FRMT_16_FLOAT (1<<2) |
Definition at line 173 of file i915_reg.h.
#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) |
Definition at line 174 of file i915_reg.h.
#define DIS0_BUFFER_ADDRESS | ( | x | ) | ((x)&~0x3) |
Definition at line 267 of file i915_reg.h.
#define DIS0_BUFFER_RESET (1<<1) |
Definition at line 268 of file i915_reg.h.
#define DIS0_BUFFER_VALID (1<<0) |
Definition at line 269 of file i915_reg.h.
#define DISABLE_SCISSOR_RECT (1<<1) |
Definition at line 310 of file i915_reg.h.
#define DITHER_CLAMPED_ALWAYS (2<<26) |
Definition at line 158 of file i915_reg.h.
#define DITHER_FULL_ALWAYS (0<<26) |
Definition at line 156 of file i915_reg.h.
#define DITHER_FULL_ON_FB_BLEND (1<<26) |
Definition at line 157 of file i915_reg.h.
#define DRAW_DITHER_OFS_X | ( | x | ) | ((x)<<26) |
Definition at line 184 of file i915_reg.h.
#define DRAW_DITHER_OFS_Y | ( | x | ) | ((x)<<24) |
Definition at line 185 of file i915_reg.h.
#define DRAW_RECT_DIS_DEPTH_OFS (1<<30) |
Definition at line 183 of file i915_reg.h.
#define DRAW_XMAX | ( | x | ) | (x) |
Definition at line 191 of file i915_reg.h.
#define DRAW_XMIN | ( | x | ) | (x) |
Definition at line 188 of file i915_reg.h.
#define DRAW_XORG | ( | x | ) | (x) |
Definition at line 194 of file i915_reg.h.
#define DRAW_YMAX | ( | x | ) | ((x)<<16) |
Definition at line 190 of file i915_reg.h.
#define DRAW_YMIN | ( | x | ) | ((x)<<16) |
Definition at line 187 of file i915_reg.h.
#define DRAW_YORG | ( | x | ) | ((x)<<16) |
Definition at line 193 of file i915_reg.h.
#define DST_ABLND_FACT | ( | f | ) | ((f)<<IAB_DST_FACTOR_SHIFT) |
Definition at line 436 of file i915_reg.h.
#define DST_BLND_FACT | ( | f | ) | ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT) |
Definition at line 434 of file i915_reg.h.
#define DSTORG_HORT_BIAS | ( | x | ) | ((x)<<20) |
Definition at line 161 of file i915_reg.h.
#define DSTORG_VERT_BIAS | ( | x | ) | ((x)<<16) |
Definition at line 162 of file i915_reg.h.
#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) |
Definition at line 302 of file i915_reg.h.
#define ENABLE_LOGIC_OP_FUNC (1<<23) |
Definition at line 450 of file i915_reg.h.
#define ENABLE_POINT_RASTER_RULE (1<<15) |
Definition at line 297 of file i915_reg.h.
#define ENABLE_SCISSOR_RECT ((1<<1) | 1) |
Definition at line 309 of file i915_reg.h.
#define ENABLE_STENCIL_TEST_MASK (1<<17) |
Definition at line 454 of file i915_reg.h.
#define ENABLE_STENCIL_WRITE_MASK (1<<16) |
Definition at line 457 of file i915_reg.h.
#define ENABLE_TEXKILL_3D_4D (1<<10) |
Definition at line 299 of file i915_reg.h.
#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) |
Definition at line 303 of file i915_reg.h.
#define FILTER_4X4_1 3 |
Definition at line 796 of file i915_reg.h.
#define FILTER_4X4_2 4 |
Definition at line 797 of file i915_reg.h.
#define FILTER_4X4_FLAT 5 |
Definition at line 798 of file i915_reg.h.
#define FILTER_6X5_MONO 6 |
Definition at line 799 of file i915_reg.h.
#define FILTER_ANISOTROPIC 2 |
Definition at line 795 of file i915_reg.h.
#define FILTER_LINEAR 1 |
Definition at line 794 of file i915_reg.h.
#define FILTER_NEAREST 0 |
Definition at line 793 of file i915_reg.h.
#define FLUSH_MAP_CACHE (1<<0) |
Definition at line 852 of file i915_reg.h.
#define FMC1_C1_C2_MODIFY_ENABLE (1<<24) |
Definition at line 220 of file i915_reg.h.
#define FMC1_C1_MASK (0xffff<<4) |
Definition at line 223 of file i915_reg.h.
#define FMC1_C1_ONE (1<<13) |
Definition at line 222 of file i915_reg.h.
#define FMC1_DENSITY_MODIFY_ENABLE (1<<23) |
Definition at line 221 of file i915_reg.h.
#define FMC1_FOGFUNC_MASK (3<<28) |
Definition at line 216 of file i915_reg.h.
#define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) |
Definition at line 211 of file i915_reg.h.
#define FMC1_FOGFUNC_PIXEL_EXP (1<<28) |
Definition at line 213 of file i915_reg.h.
#define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) |
Definition at line 214 of file i915_reg.h.
#define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) |
Definition at line 215 of file i915_reg.h.
#define FMC1_FOGFUNC_VERTEX (0<<28) |
Definition at line 212 of file i915_reg.h.
#define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) |
Definition at line 217 of file i915_reg.h.
#define FMC1_FOGINDEX_W (1<<25) |
Definition at line 219 of file i915_reg.h.
#define FMC1_FOGINDEX_Z (0<<25) |
Definition at line 218 of file i915_reg.h.
#define FMC2_C2_ONE (1<<16) |
Definition at line 225 of file i915_reg.h.
#define FMC3_D_ONE (1<<16) |
Definition at line 227 of file i915_reg.h.
#define FOG_COLOR_BLUE | ( | x | ) | (x) |
Definition at line 206 of file i915_reg.h.
#define FOG_COLOR_GREEN | ( | x | ) | ((x)<<8) |
Definition at line 205 of file i915_reg.h.
#define FOG_COLOR_RED | ( | x | ) | ((x)<<16) |
Definition at line 204 of file i915_reg.h.
#define I1_LOAD_S | ( | n | ) | (1<<(4+n)) |
Definition at line 323 of file i915_reg.h.
#define I915_MAX_ALU_INSN 64 |
Definition at line 479 of file i915_reg.h.
#define I915_MAX_DECL_INSN 27 |
Definition at line 480 of file i915_reg.h.
#define I915_MAX_TEMPORARY 16 |
Definition at line 481 of file i915_reg.h.
#define I915_MAX_TEX_INDIRECT 4 |
Definition at line 477 of file i915_reg.h.
#define I915_MAX_TEX_INSN 32 |
Definition at line 478 of file i915_reg.h.
#define I915_SET_FIELD | ( | var, | |||
mask, | |||||
value | ) | (var &= ~(mask), var |= value) |
Definition at line 33 of file i915_reg.h.
#define I915PACKCOLOR1555 | ( | r, | |||
g, | |||||
b, | |||||
a | ) |
Value:
((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \ ((a) ? 0x8000 : 0))
Definition at line 880 of file i915_reg.h.
#define I915PACKCOLOR4444 | ( | r, | |||
g, | |||||
b, | |||||
a | ) | ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) |
Definition at line 877 of file i915_reg.h.
#define I915PACKCOLOR565 | ( | r, | |||
g, | |||||
b | ) | ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) |
Definition at line 884 of file i915_reg.h.
#define I915PACKCOLOR8888 | ( | r, | |||
g, | |||||
b, | |||||
a | ) | ((a<<24) | (r<<16) | (g<<8) | b) |
Definition at line 887 of file i915_reg.h.
#define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) |
Definition at line 242 of file i915_reg.h.
#define IAB_DST_FACTOR_SHIFT 0 |
Definition at line 241 of file i915_reg.h.
#define IAB_ENABLE (1<<22) |
Definition at line 234 of file i915_reg.h.
#define IAB_FUNC_SHIFT 16 |
Definition at line 236 of file i915_reg.h.
#define IAB_MODIFY_DST_FACTOR (1<<5) |
Definition at line 240 of file i915_reg.h.
#define IAB_MODIFY_ENABLE (1<<23) |
Definition at line 233 of file i915_reg.h.
#define IAB_MODIFY_FUNC (1<<21) |
Definition at line 235 of file i915_reg.h.
#define IAB_MODIFY_SRC_FACTOR (1<<11) |
Definition at line 237 of file i915_reg.h.
#define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) |
Definition at line 239 of file i915_reg.h.
#define IAB_SRC_FACTOR_SHIFT 6 |
Definition at line 238 of file i915_reg.h.
#define INHIBIT_FLUSH_RENDER_CACHE (1<<2) |
Definition at line 853 of file i915_reg.h.
#define LI0_STATE_CONSTANTS (0x20<<8) |
Definition at line 260 of file i915_reg.h.
#define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) |
Definition at line 256 of file i915_reg.h.
#define LI0_STATE_MAP (0x08<<8) |
Definition at line 258 of file i915_reg.h.
#define LI0_STATE_PROGRAM (0x10<<8) |
Definition at line 259 of file i915_reg.h.
#define LI0_STATE_SAMPLER (0x04<<8) |
Definition at line 257 of file i915_reg.h.
#define LI0_STATE_STATIC_INDIRECT (0x01<<8) |
Definition at line 255 of file i915_reg.h.
#define LINE_STRIP_PROVOKE_VRTX | ( | x | ) | ((x)<<6) |
Definition at line 304 of file i915_reg.h.
#define LINEAR_GAMMA_BLEND_32BPP (1<<25) |
Definition at line 159 of file i915_reg.h.
#define LOD_PRECLAMP_D3D (0<<28) |
Definition at line 155 of file i915_reg.h.
#define LOD_PRECLAMP_OGL (1<<28) |
Definition at line 154 of file i915_reg.h.
#define LOGIC_OP_FUNC | ( | x | ) | ((x)<<18) |
Definition at line 451 of file i915_reg.h.
#define LOGICOP_AND 0x8 |
Definition at line 942 of file i915_reg.h.
#define LOGICOP_AND_INV 0x2 |
Definition at line 936 of file i915_reg.h.
#define LOGICOP_AND_RVRSE 0x4 |
Definition at line 938 of file i915_reg.h.
#define LOGICOP_CLEAR 0 |
Definition at line 934 of file i915_reg.h.
#define LOGICOP_COPY 0xc |
Definition at line 946 of file i915_reg.h.
#define LOGICOP_COPY_INV 0x3 |
Definition at line 937 of file i915_reg.h.
#define LOGICOP_EQUIV 0x9 |
Definition at line 943 of file i915_reg.h.
#define LOGICOP_INV 0x5 |
Definition at line 939 of file i915_reg.h.
#define LOGICOP_MASK (0xf<<18) |
Definition at line 452 of file i915_reg.h.
#define LOGICOP_NAND 0x7 |
Definition at line 941 of file i915_reg.h.
#define LOGICOP_NOOP 0xa |
Definition at line 944 of file i915_reg.h.
#define LOGICOP_NOR 0x1 |
Definition at line 935 of file i915_reg.h.
#define LOGICOP_OR 0xe |
Definition at line 948 of file i915_reg.h.
#define LOGICOP_OR_INV 0xb |
Definition at line 945 of file i915_reg.h.
#define LOGICOP_OR_RVRSE 0xd |
Definition at line 947 of file i915_reg.h.
#define LOGICOP_SET 0xf |
Definition at line 949 of file i915_reg.h.
#define LOGICOP_XOR 0x6 |
Definition at line 940 of file i915_reg.h.
#define MAPSURF_16BIT (2<<7) |
Definition at line 708 of file i915_reg.h.
#define MAPSURF_32BIT (3<<7) |
Definition at line 709 of file i915_reg.h.
#define MAPSURF_422 (5<<7) |
Definition at line 710 of file i915_reg.h.
#define MAPSURF_4BIT_INDEXED (7<<7) |
Definition at line 712 of file i915_reg.h.
#define MAPSURF_8BIT (1<<7) |
Definition at line 707 of file i915_reg.h.
#define MAPSURF_COMPRESSED (6<<7) |
Definition at line 711 of file i915_reg.h.
#define MI_BATCH_BUFFER (0x30<<23) |
Definition at line 910 of file i915_reg.h.
#define MI_BATCH_BUFFER_END (0xa<<23) |
Definition at line 912 of file i915_reg.h.
#define MI_BATCH_BUFFER_START (0x31<<23) |
Definition at line 911 of file i915_reg.h.
#define MI_FLUSH ((0<<29)|(4<<23)) |
Definition at line 851 of file i915_reg.h.
#define MI_WAIT_FOR_EVENT ((0x3<<23)) |
Definition at line 906 of file i915_reg.h.
#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) |
Definition at line 908 of file i915_reg.h.
#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6) |
Definition at line 907 of file i915_reg.h.
#define MIPFILTER_LINEAR 3 |
Definition at line 790 of file i915_reg.h.
#define MIPFILTER_NEAREST 1 |
Definition at line 789 of file i915_reg.h.
#define MIPFILTER_NONE 0 |
Definition at line 788 of file i915_reg.h.
#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) |
Definition at line 453 of file i915_reg.h.
#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) |
Definition at line 456 of file i915_reg.h.
#define MS1_MAPMASK_MASK (0x8fff<<0) |
Definition at line 695 of file i915_reg.h.
#define MS1_MAPMASK_SHIFT 0 |
Definition at line 694 of file i915_reg.h.
#define MS2_ADDRESS_MASK 0xfffffffc |
Definition at line 698 of file i915_reg.h.
#define MS2_UNTRUSTED_SURFACE (1<<31) |
Definition at line 697 of file i915_reg.h.
#define MS2_VERTICAL_LINE_STRIDE (1<<1) |
Definition at line 699 of file i915_reg.h.
#define MS2_VERTICAL_OFFSET (1<<1) |
Definition at line 700 of file i915_reg.h.
#define MS3_HEIGHT_SHIFT 21 |
Definition at line 702 of file i915_reg.h.
#define MS3_MAPSURF_FORMAT_MASK (0x7<<7) |
Definition at line 706 of file i915_reg.h.
#define MS3_MAPSURF_FORMAT_SHIFT 7 |
Definition at line 705 of file i915_reg.h.
#define MS3_MT_FORMAT_MASK (0x7 << 3) |
Definition at line 713 of file i915_reg.h.
#define MS3_MT_FORMAT_SHIFT 3 |
Definition at line 714 of file i915_reg.h.
#define MS3_PALETTE_SELECT (1<<9) |
Definition at line 704 of file i915_reg.h.
#define MS3_TILE_WALK (1<<0) |
Definition at line 756 of file i915_reg.h.
#define MS3_TILED_SURFACE (1<<1) |
Definition at line 755 of file i915_reg.h.
#define MS3_USE_FENCE_REGS (1<<2) |
Definition at line 754 of file i915_reg.h.
#define MS3_WIDTH_SHIFT 10 |
Definition at line 703 of file i915_reg.h.
#define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) |
Definition at line 765 of file i915_reg.h.
#define MS4_CUBE_FACE_ENA_NEGX (1<<20) |
Definition at line 759 of file i915_reg.h.
#define MS4_CUBE_FACE_ENA_NEGY (1<<18) |
Definition at line 761 of file i915_reg.h.
#define MS4_CUBE_FACE_ENA_NEGZ (1<<16) |
Definition at line 763 of file i915_reg.h.
#define MS4_CUBE_FACE_ENA_POSX (1<<19) |
Definition at line 760 of file i915_reg.h.
#define MS4_CUBE_FACE_ENA_POSY (1<<17) |
Definition at line 762 of file i915_reg.h.
#define MS4_CUBE_FACE_ENA_POSZ (1<<15) |
Definition at line 764 of file i915_reg.h.
#define MS4_MAX_LOD_MASK (0x3f<<9) |
Definition at line 767 of file i915_reg.h.
#define MS4_MAX_LOD_SHIFT 9 |
Definition at line 766 of file i915_reg.h.
#define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) |
Definition at line 769 of file i915_reg.h.
#define MS4_MIP_LAYOUT_LEGACY (0<<8) |
Definition at line 768 of file i915_reg.h.
#define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) |
Definition at line 770 of file i915_reg.h.
#define MS4_PITCH_SHIFT 21 |
Definition at line 758 of file i915_reg.h.
#define MS4_VOLUME_DEPTH_MASK (0xff<<0) |
Definition at line 772 of file i915_reg.h.
#define MS4_VOLUME_DEPTH_SHIFT 0 |
Definition at line 771 of file i915_reg.h.
#define MSB0_BUFFER_ADDRESS | ( | x | ) | ((x)&~0x3) |
Definition at line 276 of file i915_reg.h.
#define MSB0_BUFFER_VALID (1<<0) |
Definition at line 278 of file i915_reg.h.
#define MSB0_FORCE_LOAD (1<<1) |
Definition at line 277 of file i915_reg.h.
#define MSB1_BUFFER_LENGTH | ( | x | ) | ((x)&0xff) |
Definition at line 279 of file i915_reg.h.
#define MT_16BIT_88DVDU (5<<3) |
Definition at line 724 of file i915_reg.h.
#define MT_16BIT_A16 (9<<3) |
Definition at line 728 of file i915_reg.h.
#define MT_16BIT_ARGB1555 (1<<3) |
Definition at line 721 of file i915_reg.h.
#define MT_16BIT_ARGB4444 (2<<3) |
Definition at line 722 of file i915_reg.h.
#define MT_16BIT_AY88 (3<<3) |
Definition at line 723 of file i915_reg.h.
#define MT_16BIT_BUMP_655LDVDU (6<<3) |
Definition at line 725 of file i915_reg.h.
#define MT_16BIT_I16 (7<<3) |
Definition at line 726 of file i915_reg.h.
#define MT_16BIT_L16 (8<<3) |
Definition at line 727 of file i915_reg.h.
#define MT_16BIT_RGB565 (0<<3) |
Definition at line 720 of file i915_reg.h.
#define MT_32BIT_ABGR2101010 (9<<3) |
Definition at line 738 of file i915_reg.h.
#define MT_32BIT_ABGR8888 (1<<3) |
Definition at line 730 of file i915_reg.h.
#define MT_32BIT_ARGB2101010 (8<<3) |
Definition at line 737 of file i915_reg.h.
#define MT_32BIT_ARGB8888 (0<<3) |
Definition at line 729 of file i915_reg.h.
#define MT_32BIT_AWVU2101010 (0xA<<3) |
Definition at line 739 of file i915_reg.h.
#define MT_32BIT_AXVU8888 (5<<3) |
Definition at line 734 of file i915_reg.h.
#define MT_32BIT_GR1616 (0xB<<3) |
Definition at line 740 of file i915_reg.h.
#define MT_32BIT_LXVU8888 (6<<3) |
Definition at line 735 of file i915_reg.h.
#define MT_32BIT_QWVU8888 (4<<3) |
Definition at line 733 of file i915_reg.h.
#define MT_32BIT_VU1616 (0xC<<3) |
Definition at line 741 of file i915_reg.h.
#define MT_32BIT_xA824 (0xE<<3) |
Definition at line 743 of file i915_reg.h.
#define MT_32BIT_XBGR8888 (3<<3) |
Definition at line 732 of file i915_reg.h.
#define MT_32BIT_xI824 (0xD<<3) |
Definition at line 742 of file i915_reg.h.
#define MT_32BIT_xL824 (0xF<<3) |
Definition at line 744 of file i915_reg.h.
#define MT_32BIT_XLVU8888 (7<<3) |
Definition at line 736 of file i915_reg.h.
#define MT_32BIT_XRGB8888 (2<<3) |
Definition at line 731 of file i915_reg.h.
#define MT_422_YCRCB_NORMAL (1<<3) |
Definition at line 746 of file i915_reg.h.
#define MT_422_YCRCB_SWAPUV (2<<3) |
Definition at line 747 of file i915_reg.h.
#define MT_422_YCRCB_SWAPUVY (3<<3) |
Definition at line 748 of file i915_reg.h.
#define MT_422_YCRCB_SWAPY (0<<3) |
Definition at line 745 of file i915_reg.h.
#define MT_4BIT_IDX_ARGB8888 (7<<3) |
Definition at line 715 of file i915_reg.h.
#define MT_8BIT_A8 (4<<3) |
Definition at line 718 of file i915_reg.h.
#define MT_8BIT_I8 (0<<3) |
Definition at line 716 of file i915_reg.h.
#define MT_8BIT_L8 (1<<3) |
Definition at line 717 of file i915_reg.h.
#define MT_8BIT_MONO8 (5<<3) |
Definition at line 719 of file i915_reg.h.
#define MT_COMPRESS_DXT1 (0<<3) |
Definition at line 749 of file i915_reg.h.
#define MT_COMPRESS_DXT1_RGB (4<<3) |
Definition at line 753 of file i915_reg.h.
#define MT_COMPRESS_DXT2_3 (1<<3) |
Definition at line 750 of file i915_reg.h.
#define MT_COMPRESS_DXT4_5 (2<<3) |
Definition at line 751 of file i915_reg.h.
#define MT_COMPRESS_FXT1 (3<<3) |
Definition at line 752 of file i915_reg.h.
#define OGL_POINT_RASTER_RULE (1<<13) |
Definition at line 298 of file i915_reg.h.
#define PCI_CHIP_G33_G 0x29C2 |
Definition at line 973 of file i915_reg.h.
#define PCI_CHIP_I915_G 0x2582 |
Definition at line 968 of file i915_reg.h.
#define PCI_CHIP_I915_GM 0x2592 |
Definition at line 969 of file i915_reg.h.
#define PCI_CHIP_I945_G 0x2772 |
Definition at line 970 of file i915_reg.h.
#define PCI_CHIP_I945_GM 0x27A2 |
Definition at line 971 of file i915_reg.h.
#define PCI_CHIP_I945_GME 0x27AE |
Definition at line 972 of file i915_reg.h.
#define PCI_CHIP_Q33_G 0x29D2 |
Definition at line 975 of file i915_reg.h.
#define PCI_CHIP_Q35_G 0x29B2 |
Definition at line 974 of file i915_reg.h.
#define PIPELINE_FLUSH_RENDER_CACHE (1<<18) |
Definition at line 462 of file i915_reg.h.
#define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) |
Definition at line 463 of file i915_reg.h.
#define PRIM3D_CLEAR_RECT (0xa<<18) |
Definition at line 48 of file i915_reg.h.
#define PRIM3D_DIB (0x9<<18) |
Definition at line 874 of file i915_reg.h.
#define PRIM3D_DIB (0x9<<18) |
Definition at line 874 of file i915_reg.h.
#define PRIM3D_INLINE (CMD_3D | (0x1f<<24)) |
Definition at line 37 of file i915_reg.h.
#define PRIM3D_LINELIST (0x5<<18) |
Definition at line 870 of file i915_reg.h.
#define PRIM3D_LINELIST (0x5<<18) |
Definition at line 870 of file i915_reg.h.
#define PRIM3D_LINESTRIP (0x6<<18) |
Definition at line 871 of file i915_reg.h.
#define PRIM3D_LINESTRIP (0x6<<18) |
Definition at line 871 of file i915_reg.h.
#define PRIM3D_MASK (0x1f<<18) |
Definition at line 875 of file i915_reg.h.
#define PRIM3D_MASK (0x1f<<18) |
Definition at line 875 of file i915_reg.h.
#define PRIM3D_POINTLIST (0x8<<18) |
Definition at line 873 of file i915_reg.h.
#define PRIM3D_POINTLIST (0x8<<18) |
Definition at line 873 of file i915_reg.h.
#define PRIM3D_POLY (0x4<<18) |
Definition at line 869 of file i915_reg.h.
#define PRIM3D_POLY (0x4<<18) |
Definition at line 869 of file i915_reg.h.
#define PRIM3D_RECTLIST (0x7<<18) |
Definition at line 872 of file i915_reg.h.
#define PRIM3D_RECTLIST (0x7<<18) |
Definition at line 872 of file i915_reg.h.
#define PRIM3D_TRIFAN (0x3<<18) |
Definition at line 868 of file i915_reg.h.
#define PRIM3D_TRIFAN (0x3<<18) |
Definition at line 868 of file i915_reg.h.
#define PRIM3D_TRILIST (0x0<<18) |
Definition at line 865 of file i915_reg.h.
#define PRIM3D_TRILIST (0x0<<18) |
Definition at line 865 of file i915_reg.h.
#define PRIM3D_TRISTRIP (0x1<<18) |
Definition at line 866 of file i915_reg.h.
#define PRIM3D_TRISTRIP (0x1<<18) |
Definition at line 866 of file i915_reg.h.
#define PRIM3D_TRISTRIP_RVRSE (0x2<<18) |
Definition at line 867 of file i915_reg.h.
#define PRIM3D_TRISTRIP_RVRSE (0x2<<18) |
Definition at line 867 of file i915_reg.h.
#define PRIM3D_ZONE_INIT (0xd<<18) |
Definition at line 49 of file i915_reg.h.
#define PRIM_INDIRECT (1<<23) |
Definition at line 860 of file i915_reg.h.
#define PRIM_INDIRECT_ELTS (1<<17) |
Definition at line 863 of file i915_reg.h.
#define PRIM_INDIRECT_SEQUENTIAL (0<<17) |
Definition at line 862 of file i915_reg.h.
#define PRIM_INLINE (0<<23) |
Definition at line 861 of file i915_reg.h.
#define PS1_REG | ( | n | ) | (1<<(n)) |
Definition at line 468 of file i915_reg.h.
#define PS2_CONST_X | ( | n | ) | (n) |
Definition at line 469 of file i915_reg.h.
#define PS3_CONST_Y | ( | n | ) | (n) |
Definition at line 470 of file i915_reg.h.
#define PS4_CONST_Z | ( | n | ) | (n) |
Definition at line 471 of file i915_reg.h.
#define PS5_CONST_W | ( | n | ) | (n) |
Definition at line 472 of file i915_reg.h.
#define PSC0_BUFFER_ADDRESS | ( | x | ) | ((x)&~0x3) |
Definition at line 286 of file i915_reg.h.
#define PSC0_BUFFER_VALID (1<<0) |
Definition at line 288 of file i915_reg.h.
#define PSC0_FORCE_LOAD (1<<1) |
Definition at line 287 of file i915_reg.h.
#define PSC1_BUFFER_LENGTH | ( | x | ) | ((x)&0xff) |
Definition at line 289 of file i915_reg.h.
#define PSP0_BUFFER_ADDRESS | ( | x | ) | ((x)&~0x3) |
Definition at line 281 of file i915_reg.h.
#define PSP0_BUFFER_VALID (1<<0) |
Definition at line 283 of file i915_reg.h.
#define PSP0_FORCE_LOAD (1<<1) |
Definition at line 282 of file i915_reg.h.
#define PSP1_BUFFER_LENGTH | ( | x | ) | ((x)&0xff) |
Definition at line 284 of file i915_reg.h.
#define REG_NR_MASK 0xf |
Definition at line 518 of file i915_reg.h.
#define REG_TYPE_CONST 2 |
Definition at line 503 of file i915_reg.h.
#define REG_TYPE_MASK 0x7 |
Definition at line 517 of file i915_reg.h.
#define REG_TYPE_OC 4 |
Definition at line 511 of file i915_reg.h.
#define REG_TYPE_OD 5 |
Definition at line 512 of file i915_reg.h.
#define REG_TYPE_R 0 |
Definition at line 490 of file i915_reg.h.
#define REG_TYPE_S 3 |
Definition at line 510 of file i915_reg.h.
#define REG_TYPE_T 1 |
Definition at line 495 of file i915_reg.h.
#define REG_TYPE_U 6 |
Definition at line 516 of file i915_reg.h.
#define S0_AUTO_CACHE_INV_DISABLE (1<<0) |
Definition at line 326 of file i915_reg.h.
#define S0_VB_OFFSET_MASK 0xffffffc |
Definition at line 325 of file i915_reg.h.
#define S1_VERTEX_PITCH_MASK (0x3f<<16) |
Definition at line 331 of file i915_reg.h.
#define S1_VERTEX_PITCH_SHIFT 16 |
Definition at line 330 of file i915_reg.h.
#define S1_VERTEX_WIDTH_MASK (0x3f<<24) |
Definition at line 329 of file i915_reg.h.
#define S1_VERTEX_WIDTH_SHIFT 24 |
Definition at line 328 of file i915_reg.h.
#define S2_TEXCOORD_FMT | ( | unit, | |||
type | ) | ((type)<<(unit*4)) |
Definition at line 342 of file i915_reg.h.
#define S2_TEXCOORD_FMT0_MASK 0xf |
Definition at line 340 of file i915_reg.h.
#define S2_TEXCOORD_FMT1_SHIFT 4 |
Definition at line 341 of file i915_reg.h.
#define S2_TEXCOORD_NONE (~0) |
Definition at line 343 of file i915_reg.h.
#define S4_CULLMODE_BOTH (0<<13) |
Definition at line 356 of file i915_reg.h.
#define S4_CULLMODE_CCW (3<<13) |
Definition at line 359 of file i915_reg.h.
#define S4_CULLMODE_CW (2<<13) |
Definition at line 358 of file i915_reg.h.
#define S4_CULLMODE_MASK (3<<13) |
Definition at line 360 of file i915_reg.h.
#define S4_CULLMODE_NONE (1<<13) |
Definition at line 357 of file i915_reg.h.
#define S4_FLATSHADE_ALPHA (1<<18) |
Definition at line 352 of file i915_reg.h.
#define S4_FLATSHADE_COLOR (1<<15) |
Definition at line 355 of file i915_reg.h.
#define S4_FLATSHADE_FOG (1<<17) |
Definition at line 353 of file i915_reg.h.
#define S4_FLATSHADE_SPECULAR (1<<16) |
Definition at line 354 of file i915_reg.h.
#define S4_FORCE_DEFAULT_DIFFUSE (1<<5) |
Definition at line 370 of file i915_reg.h.
#define S4_FORCE_DEFAULT_SPECULAR (1<<4) |
Definition at line 371 of file i915_reg.h.
#define S4_LINE_ANTIALIAS_ENABLE (1<<0) |
Definition at line 375 of file i915_reg.h.
#define S4_LINE_WIDTH_MASK (0xf<<19) |
Definition at line 351 of file i915_reg.h.
#define S4_LINE_WIDTH_ONE (0x2<<19) |
Definition at line 350 of file i915_reg.h.
#define S4_LINE_WIDTH_SHIFT 19 |
Definition at line 349 of file i915_reg.h.
#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) |
Definition at line 372 of file i915_reg.h.
#define S4_POINT_WIDTH_MASK (0x1ff<<23) |
Definition at line 348 of file i915_reg.h.
#define S4_POINT_WIDTH_SHIFT 23 |
Definition at line 347 of file i915_reg.h.
#define S4_SPRITE_POINT_ENABLE (1<<1) |
Definition at line 374 of file i915_reg.h.
#define S4_VFMT_COLOR (1<<10) |
Definition at line 363 of file i915_reg.h.
#define S4_VFMT_DEPTH_OFFSET (1<<9) |
Definition at line 364 of file i915_reg.h.
#define S4_VFMT_FOG_PARAM (1<<2) |
Definition at line 373 of file i915_reg.h.
#define S4_VFMT_MASK |
Value:
(S4_VFMT_POINT_WIDTH | \ S4_VFMT_SPEC_FOG | \ S4_VFMT_COLOR | \ S4_VFMT_DEPTH_OFFSET | \ S4_VFMT_XYZW_MASK | \ S4_VFMT_FOG_PARAM)
Definition at line 377 of file i915_reg.h.
#define S4_VFMT_POINT_WIDTH (1<<12) |
Definition at line 361 of file i915_reg.h.
#define S4_VFMT_SPEC_FOG (1<<11) |
Definition at line 362 of file i915_reg.h.
#define S4_VFMT_XY (3<<6) |
Definition at line 367 of file i915_reg.h.
#define S4_VFMT_XYW (4<<6) |
Definition at line 368 of file i915_reg.h.
#define S4_VFMT_XYZ (1<<6) |
Definition at line 365 of file i915_reg.h.
#define S4_VFMT_XYZW (2<<6) |
Definition at line 366 of file i915_reg.h.
#define S4_VFMT_XYZW_MASK (7<<6) |
Definition at line 369 of file i915_reg.h.
#define S5_COLOR_DITHER_ENABLE (1<<1) |
Definition at line 406 of file i915_reg.h.
#define S5_FOG_ENABLE (1<<24) |
Definition at line 393 of file i915_reg.h.
#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) |
Definition at line 390 of file i915_reg.h.
#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) |
Definition at line 392 of file i915_reg.h.
#define S5_LAST_PIXEL_ENABLE (1<<26) |
Definition at line 391 of file i915_reg.h.
#define S5_LOGICOP_ENABLE (1<<0) |
Definition at line 407 of file i915_reg.h.
#define S5_STENCIL_FAIL_MASK (0x7<<10) |
Definition at line 399 of file i915_reg.h.
#define S5_STENCIL_FAIL_SHIFT 10 |
Definition at line 398 of file i915_reg.h.
#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) |
Definition at line 401 of file i915_reg.h.
#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 |
Definition at line 400 of file i915_reg.h.
#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) |
Definition at line 403 of file i915_reg.h.
#define S5_STENCIL_PASS_Z_PASS_SHIFT 4 |
Definition at line 402 of file i915_reg.h.
#define S5_STENCIL_REF_MASK (0xff<<16) |
Definition at line 395 of file i915_reg.h.
#define S5_STENCIL_REF_SHIFT 16 |
Definition at line 394 of file i915_reg.h.
#define S5_STENCIL_TEST_ENABLE (1<<2) |
Definition at line 405 of file i915_reg.h.
#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) |
Definition at line 397 of file i915_reg.h.
#define S5_STENCIL_TEST_FUNC_SHIFT 13 |
Definition at line 396 of file i915_reg.h.
#define S5_STENCIL_WRITE_ENABLE (1<<3) |
Definition at line 404 of file i915_reg.h.
#define S5_WRITEDISABLE_ALPHA (1<<31) |
Definition at line 385 of file i915_reg.h.
#define S5_WRITEDISABLE_BLUE (1<<28) |
Definition at line 388 of file i915_reg.h.
#define S5_WRITEDISABLE_GREEN (1<<29) |
Definition at line 387 of file i915_reg.h.
#define S5_WRITEDISABLE_MASK (0xf<<28) |
Definition at line 389 of file i915_reg.h.
#define S5_WRITEDISABLE_RED (1<<30) |
Definition at line 386 of file i915_reg.h.
#define S6_ALPHA_REF_MASK (0xff<<20) |
Definition at line 414 of file i915_reg.h.
#define S6_ALPHA_REF_SHIFT 20 |
Definition at line 413 of file i915_reg.h.
#define S6_ALPHA_TEST_ENABLE (1<<31) |
Definition at line 410 of file i915_reg.h.
#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) |
Definition at line 412 of file i915_reg.h.
#define S6_ALPHA_TEST_FUNC_SHIFT 28 |
Definition at line 411 of file i915_reg.h.
#define S6_CBUF_BLEND_ENABLE (1<<15) |
Definition at line 418 of file i915_reg.h.
#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) |
Definition at line 420 of file i915_reg.h.
#define S6_CBUF_BLEND_FUNC_SHIFT 12 |
Definition at line 419 of file i915_reg.h.
#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) |
Definition at line 424 of file i915_reg.h.
#define S6_CBUF_DST_BLEND_FACT_SHIFT 4 |
Definition at line 423 of file i915_reg.h.
#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) |
Definition at line 422 of file i915_reg.h.
#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 |
Definition at line 421 of file i915_reg.h.
#define S6_COLOR_WRITE_ENABLE (1<<2) |
Definition at line 426 of file i915_reg.h.
#define S6_DEPTH_TEST_ENABLE (1<<19) |
Definition at line 415 of file i915_reg.h.
#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) |
Definition at line 417 of file i915_reg.h.
#define S6_DEPTH_TEST_FUNC_SHIFT 16 |
Definition at line 416 of file i915_reg.h.
#define S6_DEPTH_WRITE_ENABLE (1<<3) |
Definition at line 425 of file i915_reg.h.
#define S6_TRISTRIP_PV_MASK (0x3<<0) |
Definition at line 428 of file i915_reg.h.
#define S6_TRISTRIP_PV_SHIFT 0 |
Definition at line 427 of file i915_reg.h.
#define S7_DEPTH_OFFSET_CONST_MASK ~0 |
Definition at line 430 of file i915_reg.h.
#define SCISSOR_RECT_0_XMAX | ( | x | ) | (x) |
Definition at line 319 of file i915_reg.h.
#define SCISSOR_RECT_0_XMIN | ( | x | ) | (x) |
Definition at line 316 of file i915_reg.h.
#define SCISSOR_RECT_0_YMAX | ( | x | ) | ((x)<<16) |
Definition at line 318 of file i915_reg.h.
#define SCISSOR_RECT_0_YMIN | ( | x | ) | ((x)<<16) |
Definition at line 315 of file i915_reg.h.
#define SIS0_BUFFER_ADDRESS | ( | x | ) | ((x)&~0x3) |
Definition at line 262 of file i915_reg.h.
#define SIS0_BUFFER_VALID (1<<0) |
Definition at line 264 of file i915_reg.h.
#define SIS0_FORCE_LOAD (1<<1) |
Definition at line 263 of file i915_reg.h.
#define SIS1_BUFFER_LENGTH | ( | x | ) | ((x)&0xff) |
Definition at line 265 of file i915_reg.h.
#define SRC_ABLND_FACT | ( | f | ) | ((f)<<IAB_SRC_FACTOR_SHIFT) |
Definition at line 437 of file i915_reg.h.
#define SRC_BLND_FACT | ( | f | ) | ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT) |
Definition at line 435 of file i915_reg.h.
#define SRC_ONE 5 |
Definition at line 584 of file i915_reg.h.
#define SRC_W 3 |
Definition at line 582 of file i915_reg.h.
#define SRC_X 0 |
Definition at line 579 of file i915_reg.h.
#define SRC_Y 1 |
Definition at line 580 of file i915_reg.h.
#define SRC_Z 2 |
Definition at line 581 of file i915_reg.h.
#define SRC_ZERO 4 |
Definition at line 583 of file i915_reg.h.
#define SS1_MAPMASK_MASK (0x8fff<<0) |
Definition at line 778 of file i915_reg.h.
#define SS1_MAPMASK_SHIFT 0 |
Definition at line 777 of file i915_reg.h.
#define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) |
Definition at line 785 of file i915_reg.h.
#define SS2_BASE_MIP_LEVEL_SHIFT 22 |
Definition at line 784 of file i915_reg.h.
#define SS2_CHROMAKEY_SHIFT 27 |
Definition at line 783 of file i915_reg.h.
#define SS2_COLORSPACE_CONVERSION (1<<29) |
Definition at line 782 of file i915_reg.h.
#define SS2_LOD_BIAS_MASK (0x1ff<<5) |
Definition at line 804 of file i915_reg.h.
#define SS2_LOD_BIAS_ONE (0x10<<5) |
Definition at line 803 of file i915_reg.h.
#define SS2_LOD_BIAS_SHIFT 5 |
Definition at line 802 of file i915_reg.h.
#define SS2_MAG_FILTER_MASK (0x7<<17) |
Definition at line 792 of file i915_reg.h.
#define SS2_MAG_FILTER_SHIFT 17 |
Definition at line 791 of file i915_reg.h.
#define SS2_MAX_ANISO_2 (0<<3) |
Definition at line 811 of file i915_reg.h.
#define SS2_MAX_ANISO_4 (1<<3) |
Definition at line 812 of file i915_reg.h.
#define SS2_MAX_ANISO_MASK (1<<3) |
Definition at line 810 of file i915_reg.h.
#define SS2_MIN_FILTER_MASK (0x7<<14) |
Definition at line 801 of file i915_reg.h.
#define SS2_MIN_FILTER_SHIFT 14 |
Definition at line 800 of file i915_reg.h.
#define SS2_MIP_FILTER_MASK (0x3<<20) |
Definition at line 787 of file i915_reg.h.
#define SS2_MIP_FILTER_SHIFT 20 |
Definition at line 786 of file i915_reg.h.
#define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) |
Definition at line 781 of file i915_reg.h.
#define SS2_REVERSE_GAMMA_ENABLE (1<<31) |
Definition at line 780 of file i915_reg.h.
#define SS2_SHADOW_ENABLE (1<<4) |
Definition at line 809 of file i915_reg.h.
#define SS2_SHADOW_FUNC_MASK (0x7<<0) |
Definition at line 814 of file i915_reg.h.
#define SS2_SHADOW_FUNC_SHIFT 0 |
Definition at line 813 of file i915_reg.h.
#define SS3_DEINTERLACER_ENABLE (1<<0) |
Definition at line 836 of file i915_reg.h.
#define SS3_KILL_PIXEL_ENABLE (1<<17) |
Definition at line 820 of file i915_reg.h.
#define SS3_MIN_LOD_MASK (0xff<<24) |
Definition at line 819 of file i915_reg.h.
#define SS3_MIN_LOD_ONE (0x10<<24) |
Definition at line 818 of file i915_reg.h.
#define SS3_MIN_LOD_SHIFT 24 |
Definition at line 817 of file i915_reg.h.
#define SS3_NORMALIZED_COORDS (1<<5) |
Definition at line 833 of file i915_reg.h.
#define SS3_TCX_ADDR_MODE_MASK (0x7<<12) |
Definition at line 822 of file i915_reg.h.
#define SS3_TCX_ADDR_MODE_SHIFT 12 |
Definition at line 821 of file i915_reg.h.
#define SS3_TCY_ADDR_MODE_MASK (0x7<<9) |
Definition at line 830 of file i915_reg.h.
#define SS3_TCY_ADDR_MODE_SHIFT 9 |
Definition at line 829 of file i915_reg.h.
#define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) |
Definition at line 832 of file i915_reg.h.
#define SS3_TCZ_ADDR_MODE_SHIFT 6 |
Definition at line 831 of file i915_reg.h.
#define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) |
Definition at line 835 of file i915_reg.h.
#define SS3_TEXTUREMAP_INDEX_SHIFT 1 |
Definition at line 834 of file i915_reg.h.
#define SS4_BORDER_COLOR_MASK (~0) |
Definition at line 838 of file i915_reg.h.
#define SSB0_BUFFER_ADDRESS | ( | x | ) | ((x)&~0x3) |
Definition at line 271 of file i915_reg.h.
#define SSB0_BUFFER_VALID (1<<0) |
Definition at line 273 of file i915_reg.h.
#define SSB0_FORCE_LOAD (1<<1) |
Definition at line 272 of file i915_reg.h.
#define SSB1_BUFFER_LENGTH | ( | x | ) | ((x)&0xff) |
Definition at line 274 of file i915_reg.h.
#define ST1_ENABLE (1<<16) |
Definition at line 843 of file i915_reg.h.
#define ST1_MASK (0xffff) |
Definition at line 844 of file i915_reg.h.
#define STENCIL_TEST_MASK | ( | x | ) | (((x)&0xff)<<8) |
Definition at line 455 of file i915_reg.h.
#define STENCIL_WRITE_MASK | ( | x | ) | ((x)&0xff) |
Definition at line 458 of file i915_reg.h.
#define STENCILOP_DECR 0x6 |
Definition at line 931 of file i915_reg.h.
#define STENCILOP_DECRSAT 0x4 |
Definition at line 929 of file i915_reg.h.
#define STENCILOP_INCR 0x5 |
Definition at line 930 of file i915_reg.h.
#define STENCILOP_INCRSAT 0x3 |
Definition at line 928 of file i915_reg.h.
#define STENCILOP_INVERT 0x7 |
Definition at line 932 of file i915_reg.h.
#define STENCILOP_KEEP 0 |
Definition at line 925 of file i915_reg.h.
#define STENCILOP_REPLACE 0x2 |
Definition at line 927 of file i915_reg.h.
#define STENCILOP_ZERO 0x1 |
Definition at line 926 of file i915_reg.h.
#define T0_DEST_NR_SHIFT 14 |
Definition at line 645 of file i915_reg.h.
#define T0_DEST_TYPE_SHIFT 19 |
Definition at line 636 of file i915_reg.h.
#define T0_SAMPLER_NR_MASK (0xf<<0) |
Definition at line 648 of file i915_reg.h.
#define T0_SAMPLER_NR_SHIFT 0 |
Definition at line 647 of file i915_reg.h.
#define T0_TEXKILL (0x18<<24) |
Definition at line 632 of file i915_reg.h.
#define T0_TEXLD (0x15<<24) |
Definition at line 619 of file i915_reg.h.
#define T0_TEXLDB (0x17<<24) |
Definition at line 627 of file i915_reg.h.
#define T0_TEXLDP (0x16<<24) |
Definition at line 623 of file i915_reg.h.
#define T1_ADDRESS_REG_NR_SHIFT 17 |
Definition at line 652 of file i915_reg.h.
#define T1_ADDRESS_REG_TYPE_SHIFT 24 |
Definition at line 650 of file i915_reg.h.
#define T2_MBZ 0 |
Definition at line 653 of file i915_reg.h.
#define T_DIFFUSE 8 |
Definition at line 531 of file i915_reg.h.
#define T_FOG_W 10 |
Definition at line 533 of file i915_reg.h.
#define T_SPECULAR 9 |
Definition at line 532 of file i915_reg.h.
#define T_TEX0 0 |
Definition at line 523 of file i915_reg.h.
#define T_TEX1 1 |
Definition at line 524 of file i915_reg.h.
#define T_TEX2 2 |
Definition at line 525 of file i915_reg.h.
#define T_TEX3 3 |
Definition at line 526 of file i915_reg.h.
#define T_TEX4 4 |
Definition at line 527 of file i915_reg.h.
#define T_TEX5 5 |
Definition at line 528 of file i915_reg.h.
#define T_TEX6 6 |
Definition at line 529 of file i915_reg.h.
#define T_TEX7 7 |
Definition at line 530 of file i915_reg.h.
#define TEX_DEFAULT_COLOR_D3D (1<<30) |
Definition at line 152 of file i915_reg.h.
#define TEX_DEFAULT_COLOR_OGL (0<<30) |
Definition at line 151 of file i915_reg.h.
#define TEXCOORDFMT_1D 0x3 |
Definition at line 336 of file i915_reg.h.
#define TEXCOORDFMT_2D 0x0 |
Definition at line 333 of file i915_reg.h.
#define TEXCOORDFMT_2D_16 0x4 |
Definition at line 337 of file i915_reg.h.
#define TEXCOORDFMT_3D 0x1 |
Definition at line 334 of file i915_reg.h.
#define TEXCOORDFMT_4D 0x2 |
Definition at line 335 of file i915_reg.h.
#define TEXCOORDFMT_4D_16 0x5 |
Definition at line 338 of file i915_reg.h.
#define TEXCOORDFMT_NOT_PRESENT 0xf |
Definition at line 339 of file i915_reg.h.
#define TEXCOORDMODE_CLAMP_BORDER 4 |
Definition at line 827 of file i915_reg.h.
#define TEXCOORDMODE_CLAMP_EDGE 2 |
Definition at line 825 of file i915_reg.h.
#define TEXCOORDMODE_CUBE 3 |
Definition at line 826 of file i915_reg.h.
#define TEXCOORDMODE_MIRROR 1 |
Definition at line 824 of file i915_reg.h.
#define TEXCOORDMODE_MIRROR_ONCE 5 |
Definition at line 828 of file i915_reg.h.
#define TEXCOORDMODE_WRAP 0 |
Definition at line 823 of file i915_reg.h.
#define TEXKILL_3D (0<<9) |
Definition at line 300 of file i915_reg.h.
#define TEXKILL_4D (1<<9) |
Definition at line 301 of file i915_reg.h.
#define TRI_FAN_PROVOKE_VRTX | ( | x | ) | ((x)<<3) |
Definition at line 305 of file i915_reg.h.
#define VERT_LINE_STRIDE_0 (0<<1) |
Definition at line 176 of file i915_reg.h.
#define VERT_LINE_STRIDE_1 (1<<1) |
Definition at line 175 of file i915_reg.h.
#define VERT_LINE_STRIDE_OFS_0 0 |
Definition at line 178 of file i915_reg.h.
#define VERT_LINE_STRIDE_OFS_1 1 |
Definition at line 177 of file i915_reg.h.
#define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|0x4) |
Definition at line 898 of file i915_reg.h.
#define XY_COLOR_BLT_WRITE_ALPHA (1<<21) |
Definition at line 899 of file i915_reg.h.
#define XY_COLOR_BLT_WRITE_RGB (1<<20) |
Definition at line 900 of file i915_reg.h.
#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) |
Definition at line 902 of file i915_reg.h.
#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) |
Definition at line 903 of file i915_reg.h.
#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) |
Definition at line 904 of file i915_reg.h.
#define ZR_EARLY_DEPTH (1<<29) |
Definition at line 153 of file i915_reg.h.