Go to the source code of this file.
Defines | |
| #define | OFFSET(TYPE, FIELD) ( (unsigned)&(((TYPE *)0)->FIELD) ) |
Functions | |
| static unsigned | translate_tex_target (enum pipe_texture_target target) |
| static unsigned | translate_tex_format (enum pipe_format pipe_format) |
| static unsigned | brw_buffer_offset (struct brw_context *brw, struct pipe_buffer *buffer) |
| static void | brw_update_texture_surface (struct brw_context *brw, unsigned unit) |
| static void | upload_wm_surfaces (struct brw_context *brw) |
Variables | |
| struct brw_tracked_state | brw_wm_surfaces |
| #define OFFSET | ( | TYPE, | |||
| FIELD | ) | ( (unsigned)&(((TYPE *)0)->FIELD) ) |
Definition at line 183 of file brw_wm_surface_state.c.
| static unsigned brw_buffer_offset | ( | struct brw_context * | brw, | |
| struct pipe_buffer * | buffer | |||
| ) | [static] |
Definition at line 129 of file brw_wm_surface_state.c.
References brw_winsys::get_buffer_offset, and brw_context::winsys.
00131 { 00132 return brw->winsys->get_buffer_offset(brw->winsys, 00133 buffer, 00134 0); 00135 }
| static void brw_update_texture_surface | ( | struct brw_context * | brw, | |
| unsigned | unit | |||
| ) | [static] |
Definition at line 138 of file brw_wm_surface_state.c.
References brw_context::attribs, brw_texture::base, brw_surface_state::base_addr, brw_context::bind, brw_buffer_offset(), brw_cache_data(), BRW_SS_SURFACE, BRW_SURFACE_MIPMAPLAYOUT_BELOW, BRW_TILEWALK_XMAJOR, brw_texture::buffer, brw_context::cache, brw_surface_state::cube_neg_x, brw_surface_state::cube_neg_y, brw_surface_state::cube_neg_z, brw_surface_state::cube_pos_x, brw_surface_state::cube_pos_y, brw_surface_state::cube_pos_z, pipe_texture::depth, brw_surface_state::depth, pipe_texture::format, pipe_texture::height, brw_surface_state::height, pipe_texture::last_level, brw_surface_state::min_lod, brw_surface_state::mip_count, brw_surface_state::mipmap_layout_mode, PIPE_TEXTURE_CUBE, brw_surface_state::pitch, brw_surface_state::ss0, brw_surface_state::ss1, brw_surface_state::ss2, brw_surface_state::ss3, brw_surface_state::ss4, brw_texture::stride, brw_surface_binding_table::surf_ss_offset, brw_surface_state::surface_format, brw_surface_state::surface_type, pipe_texture::target, brw_context::Texture, brw_surface_state::tile_walk, brw_surface_state::tiled_surface, translate_tex_format(), translate_tex_target(), pipe_texture::width, brw_surface_state::width, and brw_context::wm.
00140 { 00141 const struct brw_texture *tObj = brw->attribs.Texture[unit]; 00142 struct brw_surface_state surf; 00143 00144 memset(&surf, 0, sizeof(surf)); 00145 00146 surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; 00147 surf.ss0.surface_type = translate_tex_target(tObj->base.target); 00148 surf.ss0.surface_format = translate_tex_format(tObj->base.format); 00149 00150 /* This is ok for all textures with channel width 8bit or less: 00151 */ 00152 /* surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */ 00153 00154 /* Updated in emit_reloc */ 00155 surf.ss1.base_addr = brw_buffer_offset( brw, tObj->buffer ); 00156 00157 surf.ss2.mip_count = tObj->base.last_level; 00158 surf.ss2.width = tObj->base.width[0] - 1; 00159 surf.ss2.height = tObj->base.height[0] - 1; 00160 00161 surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR; 00162 surf.ss3.tiled_surface = 0; /* always zero */ 00163 surf.ss3.pitch = tObj->stride - 1; 00164 surf.ss3.depth = tObj->base.depth[0] - 1; 00165 00166 surf.ss4.min_lod = 0; 00167 00168 if (tObj->base.target == PIPE_TEXTURE_CUBE) { 00169 surf.ss0.cube_pos_x = 1; 00170 surf.ss0.cube_pos_y = 1; 00171 surf.ss0.cube_pos_z = 1; 00172 surf.ss0.cube_neg_x = 1; 00173 surf.ss0.cube_neg_y = 1; 00174 surf.ss0.cube_neg_z = 1; 00175 } 00176 00177 brw->wm.bind.surf_ss_offset[unit + 1] = 00178 brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf ); 00179 }
| static unsigned translate_tex_format | ( | enum pipe_format | pipe_format | ) | [static] |
Definition at line 57 of file brw_wm_surface_state.c.
References assert, BRW_SURFACEFORMAT_A8_UNORM, BRW_SURFACEFORMAT_B4G4R4A4_UNORM, BRW_SURFACEFORMAT_B5G5R5A1_UNORM, BRW_SURFACEFORMAT_B5G6R5_UNORM, BRW_SURFACEFORMAT_B8G8R8A8_UNORM, BRW_SURFACEFORMAT_BC1_UNORM, BRW_SURFACEFORMAT_BC1_UNORM_SRGB, BRW_SURFACEFORMAT_BC2_UNORM, BRW_SURFACEFORMAT_BC3_UNORM, BRW_SURFACEFORMAT_DXT1_RGB, BRW_SURFACEFORMAT_FXT1, BRW_SURFACEFORMAT_I16_UNORM, BRW_SURFACEFORMAT_I8_UNORM, BRW_SURFACEFORMAT_L8_UNORM, BRW_SURFACEFORMAT_L8A8_UNORM, BRW_SURFACEFORMAT_R8G8B8_UNORM, BRW_SURFACEFORMAT_R8G8B8A8_UNORM, BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB, BRW_SURFACEFORMAT_YCRCB_NORMAL, BRW_SURFACEFORMAT_YCRCB_SWAPUVY, PIPE_FORMAT_A1R5G5B5_UNORM, PIPE_FORMAT_A4R4G4B4_UNORM, PIPE_FORMAT_A8_UNORM, PIPE_FORMAT_A8L8_UNORM, PIPE_FORMAT_B8G8R8A8_UNORM, PIPE_FORMAT_I8_UNORM, PIPE_FORMAT_L8_UNORM, PIPE_FORMAT_R5G6B5_UNORM, PIPE_FORMAT_R8G8B8_UNORM, PIPE_FORMAT_R8G8B8A8_UNORM, PIPE_FORMAT_YCBCR, PIPE_FORMAT_YCBCR_REV, and PIPE_FORMAT_Z16_UNORM.
00058 { 00059 switch( pipe_format ) { 00060 case PIPE_FORMAT_L8_UNORM: 00061 return BRW_SURFACEFORMAT_L8_UNORM; 00062 00063 case PIPE_FORMAT_I8_UNORM: 00064 return BRW_SURFACEFORMAT_I8_UNORM; 00065 00066 case PIPE_FORMAT_A8_UNORM: 00067 return BRW_SURFACEFORMAT_A8_UNORM; 00068 00069 case PIPE_FORMAT_A8L8_UNORM: 00070 return BRW_SURFACEFORMAT_L8A8_UNORM; 00071 00072 case PIPE_FORMAT_R8G8B8_UNORM: 00073 assert(0); /* not supported for sampling */ 00074 return BRW_SURFACEFORMAT_R8G8B8_UNORM; 00075 00076 case PIPE_FORMAT_B8G8R8A8_UNORM: 00077 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM; 00078 00079 case PIPE_FORMAT_R8G8B8A8_UNORM: 00080 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM; 00081 00082 case PIPE_FORMAT_R5G6B5_UNORM: 00083 return BRW_SURFACEFORMAT_B5G6R5_UNORM; 00084 00085 case PIPE_FORMAT_A1R5G5B5_UNORM: 00086 return BRW_SURFACEFORMAT_B5G5R5A1_UNORM; 00087 00088 case PIPE_FORMAT_A4R4G4B4_UNORM: 00089 return BRW_SURFACEFORMAT_B4G4R4A4_UNORM; 00090 00091 case PIPE_FORMAT_YCBCR_REV: 00092 return BRW_SURFACEFORMAT_YCRCB_NORMAL; 00093 00094 case PIPE_FORMAT_YCBCR: 00095 return BRW_SURFACEFORMAT_YCRCB_SWAPUVY; 00096 #if 0 00097 case PIPE_FORMAT_RGB_FXT1: 00098 case PIPE_FORMAT_RGBA_FXT1: 00099 return BRW_SURFACEFORMAT_FXT1; 00100 #endif 00101 00102 case PIPE_FORMAT_Z16_UNORM: 00103 return BRW_SURFACEFORMAT_I16_UNORM; 00104 #if 0 00105 case PIPE_FORMAT_RGB_DXT1: 00106 return BRW_SURFACEFORMAT_DXT1_RGB; 00107 00108 case PIPE_FORMAT_RGBA_DXT1: 00109 return BRW_SURFACEFORMAT_BC1_UNORM; 00110 00111 case PIPE_FORMAT_RGBA_DXT3: 00112 return BRW_SURFACEFORMAT_BC2_UNORM; 00113 00114 case PIPE_FORMAT_RGBA_DXT5: 00115 return BRW_SURFACEFORMAT_BC3_UNORM; 00116 00117 case PIPE_FORMAT_SRGBA8: 00118 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB; 00119 case PIPE_FORMAT_SRGB_DXT1: 00120 return BRW_SURFACEFORMAT_BC1_UNORM_SRGB; 00121 #endif 00122 00123 default: 00124 assert(0); 00125 return 0; 00126 } 00127 }
| static unsigned translate_tex_target | ( | enum pipe_texture_target | target | ) | [static] |
Definition at line 36 of file brw_wm_surface_state.c.
References assert, BRW_SURFACE_1D, BRW_SURFACE_2D, BRW_SURFACE_3D, BRW_SURFACE_CUBE, PIPE_TEXTURE_1D, PIPE_TEXTURE_2D, PIPE_TEXTURE_3D, and PIPE_TEXTURE_CUBE.
00037 { 00038 switch (target) { 00039 case PIPE_TEXTURE_1D: 00040 return BRW_SURFACE_1D; 00041 00042 case PIPE_TEXTURE_2D: 00043 return BRW_SURFACE_2D; 00044 00045 case PIPE_TEXTURE_3D: 00046 return BRW_SURFACE_3D; 00047 00048 case PIPE_TEXTURE_CUBE: 00049 return BRW_SURFACE_CUBE; 00050 00051 default: 00052 assert(0); 00053 return 0; 00054 } 00055 }
| static void upload_wm_surfaces | ( | struct brw_context * | brw | ) | [static] |
Definition at line 186 of file brw_wm_surface_state.c.
References brw_context::attribs, brw_texture::base, brw_surface_state::base_addr, brw_context::bind, brw_context::bind_ss_offset, brw_context::Blend, pipe_blend_state::blend_enable, pipe_surface::block, brw_buffer_offset(), brw_cache_data(), BRW_SS_SURF_BIND, BRW_SS_SURFACE, BRW_SURFACE_2D, BRW_SURFACE_NULL, BRW_SURFACEFORMAT_B5G6R5_UNORM, BRW_SURFACEFORMAT_B8G8R8A8_UNORM, BRW_TILEWALK_XMAJOR, brw_update_texture_surface(), pipe_surface::buffer, brw_context::cache, pipe_framebuffer_state::cbufs, brw_surface_state::color_blend, pipe_blend_state::colormask, brw_context::FrameBuffer, pipe_surface::height, brw_surface_state::height, pipe_blend_state::logicop_enable, brw_context::nr_surfaces, brw_context::num_samplers, brw_context::num_textures, PIPE_MASK_A, PIPE_MASK_B, PIPE_MASK_G, PIPE_MASK_R, brw_surface_state::pitch, pipe_texture::refcount, pipe_format_block::size, brw_surface_state::ss0, brw_surface_state::ss1, brw_surface_state::ss2, brw_surface_state::ss3, pipe_surface::stride, brw_surface_binding_table::surf_ss_offset, brw_surface_state::surface_format, brw_surface_state::surface_type, brw_context::Texture, brw_surface_state::tile_walk, brw_surface_state::tiled_surface, pipe_surface::width, brw_surface_state::width, brw_context::wm, brw_surface_state::writedisable_alpha, brw_surface_state::writedisable_blue, brw_surface_state::writedisable_green, and brw_surface_state::writedisable_red.
00187 { 00188 unsigned i; 00189 00190 { 00191 struct brw_surface_state surf; 00192 00193 /* BRW_NEW_FRAMEBUFFER 00194 */ 00195 struct pipe_surface *pipe_surface = brw->attribs.FrameBuffer.cbufs[0];/*fixme*/ 00196 00197 memset(&surf, 0, sizeof(surf)); 00198 00199 if (pipe_surface != NULL) { 00200 if (pipe_surface->block.size == 4) 00201 surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; 00202 else 00203 surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; 00204 00205 surf.ss0.surface_type = BRW_SURFACE_2D; 00206 00207 surf.ss1.base_addr = brw_buffer_offset( brw, pipe_surface->buffer ); 00208 00209 surf.ss2.width = pipe_surface->width - 1; 00210 surf.ss2.height = pipe_surface->height - 1; 00211 surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR; 00212 surf.ss3.tiled_surface = 0; 00213 surf.ss3.pitch = pipe_surface->stride - 1; 00214 } else { 00215 surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; 00216 surf.ss0.surface_type = BRW_SURFACE_NULL; 00217 } 00218 00219 /* BRW_NEW_BLEND */ 00220 surf.ss0.color_blend = (!brw->attribs.Blend->logicop_enable && 00221 brw->attribs.Blend->blend_enable); 00222 00223 00224 surf.ss0.writedisable_red = !(brw->attribs.Blend->colormask & PIPE_MASK_R); 00225 surf.ss0.writedisable_green = !(brw->attribs.Blend->colormask & PIPE_MASK_G); 00226 surf.ss0.writedisable_blue = !(brw->attribs.Blend->colormask & PIPE_MASK_B); 00227 surf.ss0.writedisable_alpha = !(brw->attribs.Blend->colormask & PIPE_MASK_A); 00228 00229 00230 00231 00232 brw->wm.bind.surf_ss_offset[0] = brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf ); 00233 00234 brw->wm.nr_surfaces = 1; 00235 } 00236 00237 00238 /* BRW_NEW_TEXTURE 00239 */ 00240 for (i = 0; i < brw->num_textures && i < brw->num_samplers; i++) { 00241 const struct brw_texture *texUnit = brw->attribs.Texture[i]; 00242 00243 if (texUnit && 00244 texUnit->base.refcount/*(texUnit->refcount > 0) == really used */) { 00245 00246 brw_update_texture_surface(brw, i); 00247 00248 brw->wm.nr_surfaces = i+2; 00249 } 00250 else { 00251 brw->wm.bind.surf_ss_offset[i+1] = 0; 00252 } 00253 } 00254 00255 brw->wm.bind_ss_offset = brw_cache_data( &brw->cache[BRW_SS_SURF_BIND], 00256 &brw->wm.bind ); 00257 }
| struct brw_tracked_state brw_wm_surfaces |
Initial value:
{
.dirty = {
.brw = ( 0x80 |
0x8 |
0x800 ),
.cache = 0
},
.update = upload_wm_surfaces,
}
Definition at line 296 of file brw_wm_surface_state.c.
1.5.4