GPU Driver Documentation¶
- drm/amdgpu AMDgpu driver
- Core Driver Infrastructure
- Ring Buffer
- AMD Hardware Components Information per Product
- Module Parameters
- drm/amdgpu - Graphics and Compute (GC)
- drm/amd/display - Display Core (DC)
- User Mode Queues
- dGPU firmware flashing
- AMDGPU XGMI Support
- AMDGPU RAS Support
- GPU Power/Thermal Controls and Monitoring
- Misc AMDGPU driver information
- GPU Debugging
- AMDGPU DebugFS
- AMDGPU Process Isolation
- AMDGPU Glossary
- Peak Tops Limiter (PTL) sysfs Interface
- drm/i915 Intel GFX Driver
- Core Driver Infrastructure
- GT Programming
- Memory Management and Command Submission
- Intel GPU Basics
- Locking Guidelines
- GEM BO Management Implementation Details
- Buffer Object Eviction
- Buffer Object Memory Shrinking
- Batchbuffer Parsing
- User Batchbuffer Execution
- Scheduling
- Logical Rings, Logical Ring Contexts and Execlists
- Global GTT views
- GTT Fences and Swizzling
- Object Tiling IOCTLs
- Protected Objects
- Microcontrollers
- Tracing
- Perf
- Style
- i915 DRM client usage stats implementation
- drm/imagination PowerVR Graphics Driver
- Intel Display Driver
- Asynchronous Page Flip
- Atomic Modeset Support
- High Definition Audio
- Intel HDMI LPE Audio Support
- Content Adaptive Sharpness Filter (CASF)
- Display clocks
- Common Primary Timing Generator (CMTG)
- DMC Firmware Support
- DMC Flip Queue
- DMC wakelock support
- DPIO
- Display PLLs
intel_get_dpll_by_id()intel_dpll_enable()intel_dpll_disable()intel_dpll_crtc_get()intel_dpll_crtc_put()intel_dpll_swap_state()icl_set_active_port_dpll()intel_dpll_init()intel_dpll_compute()intel_dpll_reserve()intel_dpll_release()intel_dpll_update_active()intel_dpll_get_freq()intel_dpll_get_hw_state()intel_dpll_dump_hw_state()intel_dpll_compare_hw_state()intel_dpll_idintel_dpll_statedpll_infointel_dpll
- Display Refresh Rate Switching (DRRS)
- Display State Buffer
- Frame Buffer Compression (FBC)
- Display FIFO Underrun Reporting
- Frontbuffer Tracking
- Hotplug
- Atomic Plane Helpers
- Panel Self Refresh PSR (PSR/SRD)
intel_psr_disable()intel_psr_pause()intel_psr_resume()intel_psr_needs_vblank_notification()intel_psr_trigger_frame_change_event()intel_psr_min_set_context_latency()intel_psr_wait_for_idle_locked()intel_psr_invalidate()intel_psr_flush()intel_psr_init()intel_psr_link_ok()intel_psr_lock()intel_psr_unlock()intel_psr_notify_dc5_dc6()intel_psr_dc5_dc6_wa_init()intel_psr_notify_pipe_change()intel_psr_notify_vblank_enable_disable()
- Synopsis PHY support
- Video BIOS Table (VBT)
- drm/mcde ST-Ericsson MCDE Multi-channel display engine
- drm/meson AmLogic Meson Video Processing Unit
- drm/nouveau NVIDIA GPU Driver
- drm/pl111 ARM PrimeCell PL110 and PL111 CLCD Driver
- drm/tegra NVIDIA Tegra GPU and display driver
- drm/tve200 Faraday TV Encoder 200
- drm/v3d Broadcom V3D Graphics Driver
- drm/vc4 Broadcom VC4 Graphics Driver
- drm/vkms Virtual Kernel Modesetting
- drm/bridge/dw-hdmi Synopsys DesignWare HDMI Controller
- drm/xen-front Xen para-virtualized frontend driver
- drm/xe Intel GFX Driver
- Memory Management
- Map Layer
- Migrate Layer
- Execution Queue
- Command submission
- Runtime Power Management
- Xe GT Frequency Management
- Pcode
- Survivability Mode
- GT Multicast/Replicated (MCR) Register Support
- Hardware workarounds
- Register Table Processing
- Firmware
- Multi-tile Devices
- Debugging
- Xe Device Coredump
- Xe Device Wedging
- Xe DRM client usage stats implementation
- Xe Configfs
- Xe GT Statistics
- Arm Framebuffer Compression (AFBC)
- drm/komeda Arm display driver
- drm/Panfrost Mali Driver
- drm/Panthor CSF driver
- Xilinx ZynqMP Ultrascale+ DisplayPort Subsystem
- debugfs
- Internals
zynqmp_dpsub_layer_idzynqmp_dpsubzynqmp_dpsub_drmzynqmp_dpsub_layer_modezynqmp_disp_formatzynqmp_disp_layer_dmazynqmp_disp_layer_infozynqmp_disp_layerzynqmp_dispzynqmp_disp_avbuf_set_format()zynqmp_disp_avbuf_set_clocks_sources()zynqmp_disp_avbuf_enable_channels()zynqmp_disp_avbuf_disable_channels()zynqmp_disp_avbuf_enable_audio()zynqmp_disp_avbuf_disable_audio()zynqmp_disp_avbuf_enable_video()zynqmp_disp_avbuf_disable_video()zynqmp_disp_avbuf_enable()zynqmp_disp_avbuf_disable()zynqmp_disp_blend_set_output_format()zynqmp_disp_blend_set_bg_color()zynqmp_disp_blend_set_global_alpha()zynqmp_disp_blend_layer_set_csc()zynqmp_disp_blend_layer_enable()zynqmp_disp_blend_layer_disable()zynqmp_disp_layer_find_format()zynqmp_disp_layer_find_live_format()zynqmp_disp_layer_drm_formats()zynqmp_disp_live_layer_formats()zynqmp_disp_layer_enable()zynqmp_disp_layer_disable()zynqmp_disp_layer_set_format()zynqmp_disp_layer_set_live_format()zynqmp_disp_layer_update()zynqmp_disp_layer_release_dma()zynqmp_disp_destroy_layers()zynqmp_disp_layer_request_dma()zynqmp_disp_create_layers()zynqmp_disp_enable()zynqmp_disp_disable()zynqmp_disp_setup_clock()zynqmp_dp_link_configzynqmp_dp_modezynqmp_dp_configtest_patternzynqmp_dp_testzynqmp_dp_train_set_privzynqmp_dpzynqmp_dp_phy_init()zynqmp_dp_phy_exit()zynqmp_dp_phy_probe()zynqmp_dp_phy_ready()zynqmp_dp_max_rate()zynqmp_dp_mode_configure()zynqmp_dp_adjust_train()zynqmp_dp_update_vs_emph()zynqmp_dp_link_train_cr()zynqmp_dp_link_train_ce()zynqmp_dp_setup()zynqmp_dp_train()zynqmp_dp_train_loop()zynqmp_dp_aux_cmd_submit()zynqmp_dp_aux_init()zynqmp_dp_aux_cleanup()zynqmp_dp_update_misc()zynqmp_dp_set_format()zynqmp_dp_encoder_mode_set_transfer_unit()zynqmp_dp_encoder_mode_set_stream()zynqmp_dp_disp_connected_live_layer()zynqmp_dp_set_test_pattern()zynqmp_dp_enable_vblank()zynqmp_dp_disable_vblank()zynqmp_dpsub_drm_handle_vblank()
- nova NVIDIA GPU drivers