i915_state.c

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00001 /**************************************************************************
00002  * 
00003  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
00004  * All Rights Reserved.
00005  *
00006  * Permission is hereby granted, free of charge, to any person obtaining a
00007  * copy of this software and associated documentation files (the
00008  * "Software"), to deal in the Software without restriction, including
00009  * without limitation the rights to use, copy, modify, merge, publish,
00010  * distribute, sub license, and/or sell copies of the Software, and to
00011  * permit persons to whom the Software is furnished to do so, subject to
00012  * the following conditions:
00013  * 
00014  * The above copyright notice and this permission notice (including the
00015  * next paragraph) shall be included in all copies or substantial portions
00016  * of the Software.
00017  * 
00018  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00019  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00020  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
00021  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
00022  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
00023  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
00024  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
00025  * 
00026  **************************************************************************/
00027 
00028 /* Authors:  Keith Whitwell <keith@tungstengraphics.com>
00029  */
00030 
00031 
00032 #include "draw/draw_context.h"
00033 #include "pipe/p_winsys.h"
00034 #include "pipe/p_inlines.h"
00035 #include "util/u_math.h"
00036 #include "util/u_memory.h"
00037 #include "tgsi/tgsi_parse.h"
00038 
00039 #include "i915_context.h"
00040 #include "i915_reg.h"
00041 #include "i915_state.h"
00042 #include "i915_state_inlines.h"
00043 #include "i915_fpc.h"
00044 
00045 /* The i915 (and related graphics cores) do not support GL_CLAMP.  The
00046  * Intel drivers for "other operating systems" implement GL_CLAMP as
00047  * GL_CLAMP_TO_EDGE, so the same is done here.
00048  */
00049 static unsigned
00050 translate_wrap_mode(unsigned wrap)
00051 {
00052    switch (wrap) {
00053    case PIPE_TEX_WRAP_REPEAT:
00054       return TEXCOORDMODE_WRAP;
00055    case PIPE_TEX_WRAP_CLAMP:
00056       return TEXCOORDMODE_CLAMP_EDGE;   /* not quite correct */
00057    case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
00058       return TEXCOORDMODE_CLAMP_EDGE;
00059    case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
00060       return TEXCOORDMODE_CLAMP_BORDER;
00061 //   case PIPE_TEX_WRAP_MIRRORED_REPEAT:
00062 //      return TEXCOORDMODE_MIRROR;
00063    default:
00064       return TEXCOORDMODE_WRAP;
00065    }
00066 }
00067 
00068 static unsigned translate_img_filter( unsigned filter )
00069 {
00070    switch (filter) {
00071    case PIPE_TEX_FILTER_NEAREST:
00072       return FILTER_NEAREST;
00073    case PIPE_TEX_FILTER_LINEAR:
00074       return FILTER_LINEAR;
00075    case PIPE_TEX_FILTER_ANISO:
00076       return FILTER_ANISOTROPIC;
00077    default:
00078       assert(0);
00079       return FILTER_NEAREST;
00080    }
00081 }
00082 
00083 static unsigned translate_mip_filter( unsigned filter )
00084 {
00085    switch (filter) {
00086    case PIPE_TEX_MIPFILTER_NONE:
00087       return MIPFILTER_NONE;
00088    case PIPE_TEX_MIPFILTER_NEAREST:
00089       return MIPFILTER_NEAREST;
00090    case PIPE_TEX_MIPFILTER_LINEAR:
00091       return MIPFILTER_LINEAR;
00092    default:
00093       assert(0);
00094       return MIPFILTER_NONE;
00095    }
00096 }
00097 
00098 
00099 /* None of this state is actually used for anything yet.
00100  */
00101 static void *
00102 i915_create_blend_state(struct pipe_context *pipe,
00103                         const struct pipe_blend_state *blend)
00104 {
00105    struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state );
00106 
00107    {
00108       unsigned eqRGB  = blend->rgb_func;
00109       unsigned srcRGB = blend->rgb_src_factor;
00110       unsigned dstRGB = blend->rgb_dst_factor;
00111 
00112       unsigned eqA    = blend->alpha_func;
00113       unsigned srcA   = blend->alpha_src_factor;
00114       unsigned dstA   = blend->alpha_dst_factor;
00115 
00116       /* Special handling for MIN/MAX filter modes handled at
00117        * state_tracker level.
00118        */
00119 
00120       if (srcA != srcRGB ||
00121           dstA != dstRGB ||
00122           eqA != eqRGB) {
00123 
00124          cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
00125                           IAB_MODIFY_ENABLE |
00126                           IAB_ENABLE |
00127                           IAB_MODIFY_FUNC |
00128                           IAB_MODIFY_SRC_FACTOR |
00129                           IAB_MODIFY_DST_FACTOR |
00130                           SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
00131                           DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
00132                           (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
00133       }
00134       else {
00135          cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
00136                           IAB_MODIFY_ENABLE |
00137                           0);
00138       }
00139    }
00140 
00141    cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
00142                         ENABLE_LOGIC_OP_FUNC |
00143                         LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
00144 
00145    if (blend->logicop_enable)
00146       cso_data->LIS5 |= S5_LOGICOP_ENABLE;
00147 
00148    if (blend->dither)
00149       cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
00150 
00151    if ((blend->colormask & PIPE_MASK_R) == 0)
00152       cso_data->LIS5 |= S5_WRITEDISABLE_RED;
00153 
00154    if ((blend->colormask & PIPE_MASK_G) == 0)
00155       cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
00156 
00157    if ((blend->colormask & PIPE_MASK_B) == 0)
00158       cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
00159 
00160    if ((blend->colormask & PIPE_MASK_A) == 0)
00161       cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA;
00162 
00163    if (blend->blend_enable) {
00164       unsigned funcRGB = blend->rgb_func;
00165       unsigned srcRGB  = blend->rgb_src_factor;
00166       unsigned dstRGB  = blend->rgb_dst_factor;
00167 
00168       cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE |
00169                          SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
00170                          DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
00171                          (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
00172    }
00173 
00174    return cso_data;
00175 }
00176 
00177 static void i915_bind_blend_state(struct pipe_context *pipe,
00178                                   void *blend)
00179 {
00180    struct i915_context *i915 = i915_context(pipe);
00181    draw_flush(i915->draw);
00182 
00183    i915->blend = (struct i915_blend_state*)blend;
00184 
00185    i915->dirty |= I915_NEW_BLEND;
00186 }
00187 
00188 
00189 static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
00190 {
00191    FREE(blend);
00192 }
00193 
00194 static void i915_set_blend_color( struct pipe_context *pipe,
00195                              const struct pipe_blend_color *blend_color )
00196 {
00197    struct i915_context *i915 = i915_context(pipe);
00198    draw_flush(i915->draw);
00199 
00200    i915->blend_color = *blend_color;
00201 
00202    i915->dirty |= I915_NEW_BLEND;
00203 }
00204 
00205 static void *
00206 i915_create_sampler_state(struct pipe_context *pipe,
00207                           const struct pipe_sampler_state *sampler)
00208 {
00209    struct i915_sampler_state *cso = CALLOC_STRUCT( i915_sampler_state );
00210    const unsigned ws = sampler->wrap_s;
00211    const unsigned wt = sampler->wrap_t;
00212    const unsigned wr = sampler->wrap_r;
00213    unsigned minFilt, magFilt;
00214    unsigned mipFilt;
00215 
00216    cso->templ = sampler;
00217 
00218    mipFilt = translate_mip_filter(sampler->min_mip_filter);
00219    minFilt = translate_img_filter( sampler->min_img_filter );
00220    magFilt = translate_img_filter( sampler->mag_img_filter );
00221    
00222    if (sampler->max_anisotropy > 2.0) {
00223       cso->state[0] |= SS2_MAX_ANISO_4;
00224    }
00225 
00226    {
00227       int b = (int) (sampler->lod_bias * 16.0);
00228       b = CLAMP(b, -256, 255);
00229       cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
00230    }
00231 
00232    /* Shadow:
00233     */
00234    if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) 
00235    {
00236       cso->state[0] |= (SS2_SHADOW_ENABLE |
00237                         i915_translate_compare_func(sampler->compare_func));
00238 
00239       minFilt = FILTER_4X4_FLAT;
00240       magFilt = FILTER_4X4_FLAT;
00241    }
00242 
00243    cso->state[0] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
00244                      (mipFilt << SS2_MIP_FILTER_SHIFT) |
00245                      (magFilt << SS2_MAG_FILTER_SHIFT));
00246 
00247    cso->state[1] |=
00248       ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
00249        (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
00250        (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
00251 
00252    if (sampler->normalized_coords)
00253       cso->state[1] |= SS3_NORMALIZED_COORDS;
00254 
00255    {
00256       int minlod = (int) (16.0 * sampler->min_lod);
00257       int maxlod = (int) (16.0 * sampler->max_lod);
00258       minlod = CLAMP(minlod, 0, 16 * 11);
00259       maxlod = CLAMP(maxlod, 0, 16 * 11);
00260 
00261       if (minlod > maxlod)
00262          maxlod = minlod;
00263 
00264       cso->minlod = minlod;
00265       cso->maxlod = maxlod;
00266    }
00267 
00268    {
00269       ubyte r = float_to_ubyte(sampler->border_color[0]);
00270       ubyte g = float_to_ubyte(sampler->border_color[1]);
00271       ubyte b = float_to_ubyte(sampler->border_color[2]);
00272       ubyte a = float_to_ubyte(sampler->border_color[3]);
00273       cso->state[2] = I915PACKCOLOR8888(r, g, b, a);
00274    }
00275    return cso;
00276 }
00277 
00278 static void i915_bind_sampler_states(struct pipe_context *pipe,
00279                                      unsigned num, void **sampler)
00280 {
00281    struct i915_context *i915 = i915_context(pipe);
00282    unsigned i;
00283 
00284    assert(num <= PIPE_MAX_SAMPLERS);
00285 
00286    /* Check for no-op */
00287    if (num == i915->num_samplers &&
00288        !memcmp(i915->sampler, sampler, num * sizeof(void *)))
00289       return;
00290 
00291    draw_flush(i915->draw);
00292 
00293    for (i = 0; i < num; ++i)
00294       i915->sampler[i] = sampler[i];
00295    for (i = num; i < PIPE_MAX_SAMPLERS; ++i)
00296       i915->sampler[i] = NULL;
00297 
00298    i915->num_samplers = num;
00299 
00300    i915->dirty |= I915_NEW_SAMPLER;
00301 }
00302 
00303 static void i915_delete_sampler_state(struct pipe_context *pipe,
00304                                       void *sampler)
00305 {
00306    FREE(sampler);
00307 }
00308 
00309 
00314 static void *
00315 i915_create_depth_stencil_state(struct pipe_context *pipe,
00316                                 const struct pipe_depth_stencil_alpha_state *depth_stencil)
00317 {
00318    struct i915_depth_stencil_state *cso = CALLOC_STRUCT( i915_depth_stencil_state );
00319 
00320    {
00321       int testmask = depth_stencil->stencil[0].value_mask & 0xff;
00322       int writemask = depth_stencil->stencil[0].write_mask & 0xff;
00323 
00324       cso->stencil_modes4 |= (_3DSTATE_MODES_4_CMD |
00325                               ENABLE_STENCIL_TEST_MASK |
00326                               STENCIL_TEST_MASK(testmask) |
00327                               ENABLE_STENCIL_WRITE_MASK |
00328                               STENCIL_WRITE_MASK(writemask));
00329    }
00330 
00331    if (depth_stencil->stencil[0].enabled) {
00332       int test = i915_translate_compare_func(depth_stencil->stencil[0].func);
00333       int fop  = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
00334       int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
00335       int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
00336       int ref  = depth_stencil->stencil[0].ref_value & 0xff;
00337 
00338       cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
00339                             S5_STENCIL_WRITE_ENABLE |
00340                             (ref  << S5_STENCIL_REF_SHIFT) |
00341                             (test << S5_STENCIL_TEST_FUNC_SHIFT) |
00342                             (fop  << S5_STENCIL_FAIL_SHIFT) |
00343                             (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
00344                             (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
00345    }
00346 
00347    if (depth_stencil->stencil[1].enabled) {
00348       int test  = i915_translate_compare_func(depth_stencil->stencil[1].func);
00349       int fop   = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
00350       int dfop  = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
00351       int dpop  = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
00352       int ref   = depth_stencil->stencil[1].ref_value & 0xff;
00353       int tmask = depth_stencil->stencil[1].value_mask & 0xff;
00354       int wmask = depth_stencil->stencil[1].write_mask & 0xff;
00355 
00356       cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
00357                      BFO_ENABLE_STENCIL_FUNCS |
00358                      BFO_ENABLE_STENCIL_TWO_SIDE |
00359                      BFO_ENABLE_STENCIL_REF |
00360                      BFO_STENCIL_TWO_SIDE |
00361                      (ref  << BFO_STENCIL_REF_SHIFT) |
00362                      (test << BFO_STENCIL_TEST_SHIFT) |
00363                      (fop  << BFO_STENCIL_FAIL_SHIFT) |
00364                      (dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
00365                      (dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
00366 
00367       cso->bfo[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS |
00368                      BFM_ENABLE_STENCIL_TEST_MASK |
00369                      BFM_ENABLE_STENCIL_WRITE_MASK |
00370                      (tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
00371                      (wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
00372    }
00373    else {
00374       /* This actually disables two-side stencil: The bit set is a
00375        * modify-enable bit to indicate we are changing the two-side
00376        * setting.  Then there is a symbolic zero to show that we are
00377        * setting the flag to zero/off.
00378        */
00379       cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
00380                      BFO_ENABLE_STENCIL_TWO_SIDE |
00381                      0);
00382       cso->bfo[1] = 0;
00383    }
00384 
00385    if (depth_stencil->depth.enabled) {
00386       int func = i915_translate_compare_func(depth_stencil->depth.func);
00387 
00388       cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
00389                           (func << S6_DEPTH_TEST_FUNC_SHIFT));
00390 
00391       if (depth_stencil->depth.writemask)
00392          cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
00393    }
00394 
00395    if (depth_stencil->alpha.enabled) {
00396       int test = i915_translate_compare_func(depth_stencil->alpha.func);
00397       ubyte refByte = float_to_ubyte(depth_stencil->alpha.ref);
00398 
00399       cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
00400                           (test << S6_ALPHA_TEST_FUNC_SHIFT) |
00401                           (((unsigned) refByte) << S6_ALPHA_REF_SHIFT));
00402    }
00403 
00404    return cso;
00405 }
00406 
00407 static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
00408                                           void *depth_stencil)
00409 {
00410    struct i915_context *i915 = i915_context(pipe);
00411    draw_flush(i915->draw);
00412 
00413    i915->depth_stencil = (const struct i915_depth_stencil_state *)depth_stencil;
00414 
00415    i915->dirty |= I915_NEW_DEPTH_STENCIL;
00416 }
00417 
00418 static void i915_delete_depth_stencil_state(struct pipe_context *pipe,
00419                                             void *depth_stencil)
00420 {
00421    FREE(depth_stencil);
00422 }
00423 
00424 
00425 static void i915_set_scissor_state( struct pipe_context *pipe,
00426                                  const struct pipe_scissor_state *scissor )
00427 {
00428    struct i915_context *i915 = i915_context(pipe);
00429    draw_flush(i915->draw);
00430 
00431    memcpy( &i915->scissor, scissor, sizeof(*scissor) );
00432    i915->dirty |= I915_NEW_SCISSOR;
00433 }
00434 
00435 
00436 static void i915_set_polygon_stipple( struct pipe_context *pipe,
00437                                    const struct pipe_poly_stipple *stipple )
00438 {
00439 }
00440 
00441 
00442 
00443 static void *
00444 i915_create_fs_state(struct pipe_context *pipe,
00445                      const struct pipe_shader_state *templ)
00446 {
00447    struct i915_context *i915 = i915_context(pipe);
00448    struct i915_fragment_shader *ifs = CALLOC_STRUCT(i915_fragment_shader);
00449    if (!ifs)
00450       return NULL;
00451 
00452    ifs->state.tokens = tgsi_dup_tokens(templ->tokens);
00453 
00454    tgsi_scan_shader(templ->tokens, &ifs->info);
00455 
00456    /* The shader's compiled to i915 instructions here */
00457    i915_translate_fragment_program(i915, ifs);
00458 
00459    return ifs;
00460 }
00461 
00462 static void
00463 i915_bind_fs_state(struct pipe_context *pipe, void *shader)
00464 {
00465    struct i915_context *i915 = i915_context(pipe);
00466    draw_flush(i915->draw);
00467 
00468    i915->fs = (struct i915_fragment_shader*) shader;
00469 
00470    i915->dirty |= I915_NEW_FS;
00471 }
00472 
00473 static
00474 void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
00475 {
00476    struct i915_fragment_shader *ifs = (struct i915_fragment_shader *) shader;
00477 
00478    if (ifs->program)
00479       FREE(ifs->program);
00480    ifs->program_len = 0;
00481 
00482    FREE((struct tgsi_token *)ifs->state.tokens);
00483 
00484    FREE(ifs);
00485 }
00486 
00487 
00488 static void *
00489 i915_create_vs_state(struct pipe_context *pipe,
00490                      const struct pipe_shader_state *templ)
00491 {
00492    struct i915_context *i915 = i915_context(pipe);
00493 
00494    /* just pass-through to draw module */
00495    return draw_create_vertex_shader(i915->draw, templ);
00496 }
00497 
00498 static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
00499 {
00500    struct i915_context *i915 = i915_context(pipe);
00501 
00502    /* just pass-through to draw module */
00503    draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
00504 
00505    i915->dirty |= I915_NEW_VS;
00506 }
00507 
00508 static void i915_delete_vs_state(struct pipe_context *pipe, void *shader)
00509 {
00510    struct i915_context *i915 = i915_context(pipe);
00511 
00512    /* just pass-through to draw module */
00513    draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
00514 }
00515 
00516 static void i915_set_constant_buffer(struct pipe_context *pipe,
00517                                      uint shader, uint index,
00518                                      const struct pipe_constant_buffer *buf)
00519 {
00520    struct i915_context *i915 = i915_context(pipe);
00521    struct pipe_winsys *ws = pipe->winsys;
00522    draw_flush(i915->draw);
00523 
00524    assert(shader < PIPE_SHADER_TYPES);
00525    assert(index == 0);
00526 
00527    /* Make a copy of shader constants.
00528     * During fragment program translation we may add additional
00529     * constants to the array.
00530     *
00531     * We want to consider the situation where some user constants
00532     * (ex: a material color) may change frequently but the shader program
00533     * stays the same.  In that case we should only be updating the first
00534     * N constants, leaving any extras from shader translation alone.
00535     */
00536    if (buf) {
00537       void *mapped;
00538       if (buf->size &&
00539           (mapped = ws->buffer_map(ws, buf->buffer,
00540                                    PIPE_BUFFER_USAGE_CPU_READ))) {
00541          memcpy(i915->current.constants[shader], mapped, buf->size);
00542          ws->buffer_unmap(ws, buf->buffer);
00543          i915->current.num_user_constants[shader]
00544             = buf->size / (4 * sizeof(float));
00545       }
00546       else {
00547          i915->current.num_user_constants[shader] = 0;
00548       }
00549    }
00550 
00551    i915->dirty |= I915_NEW_CONSTANTS;
00552 }
00553 
00554 
00555 static void i915_set_sampler_textures(struct pipe_context *pipe,
00556                                       unsigned num,
00557                                       struct pipe_texture **texture)
00558 {
00559    struct i915_context *i915 = i915_context(pipe);
00560    uint i;
00561 
00562    assert(num <= PIPE_MAX_SAMPLERS);
00563 
00564    /* Check for no-op */
00565    if (num == i915->num_textures &&
00566        !memcmp(i915->texture, texture, num * sizeof(struct pipe_texture *)))
00567       return;
00568 
00569    /* Fixes wrong texture in texobj with VBUF */
00570    draw_flush(i915->draw);
00571 
00572    for (i = 0; i < num; i++)
00573       pipe_texture_reference((struct pipe_texture **) &i915->texture[i],
00574                              texture[i]);
00575 
00576    for (i = num; i < i915->num_textures; i++)
00577       pipe_texture_reference((struct pipe_texture **) &i915->texture[i],
00578                              NULL);
00579 
00580    i915->num_textures = num;
00581 
00582    i915->dirty |= I915_NEW_TEXTURE;
00583 }
00584 
00585 
00586 
00587 static void i915_set_framebuffer_state(struct pipe_context *pipe,
00588                                        const struct pipe_framebuffer_state *fb)
00589 {
00590    struct i915_context *i915 = i915_context(pipe);
00591    draw_flush(i915->draw);
00592 
00593    i915->framebuffer = *fb; /* struct copy */
00594 
00595    i915->dirty |= I915_NEW_FRAMEBUFFER;
00596 }
00597 
00598 
00599 
00600 static void i915_set_clip_state( struct pipe_context *pipe,
00601                              const struct pipe_clip_state *clip )
00602 {
00603    struct i915_context *i915 = i915_context(pipe);
00604    draw_flush(i915->draw);
00605 
00606    draw_set_clip_state(i915->draw, clip);
00607 
00608    i915->dirty |= I915_NEW_CLIP;
00609 }
00610 
00611 
00612 
00613 /* Called when driver state tracker notices changes to the viewport
00614  * matrix:
00615  */
00616 static void i915_set_viewport_state( struct pipe_context *pipe,
00617                                      const struct pipe_viewport_state *viewport )
00618 {
00619    struct i915_context *i915 = i915_context(pipe);
00620 
00621    i915->viewport = *viewport; /* struct copy */
00622 
00623    /* pass the viewport info to the draw module */
00624    draw_set_viewport_state(i915->draw, &i915->viewport);
00625 
00626    i915->dirty |= I915_NEW_VIEWPORT;
00627 }
00628 
00629 
00630 static void *
00631 i915_create_rasterizer_state(struct pipe_context *pipe,
00632                              const struct pipe_rasterizer_state *rasterizer)
00633 {
00634    struct i915_rasterizer_state *cso = CALLOC_STRUCT( i915_rasterizer_state );
00635 
00636    cso->templ = rasterizer;
00637    cso->color_interp = rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR;
00638    cso->light_twoside = rasterizer->light_twoside;
00639    cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE;
00640    cso->ds[1].f = rasterizer->offset_scale;
00641    if (rasterizer->poly_stipple_enable) {
00642       cso->st |= ST1_ENABLE;
00643    }
00644 
00645    if (rasterizer->scissor)
00646       cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT;
00647    else
00648       cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT;
00649 
00650    switch (rasterizer->cull_mode) {
00651    case PIPE_WINDING_NONE:
00652       cso->LIS4 |= S4_CULLMODE_NONE;
00653       break;
00654    case PIPE_WINDING_CW:
00655       cso->LIS4 |= S4_CULLMODE_CW;
00656       break;
00657    case PIPE_WINDING_CCW:
00658       cso->LIS4 |= S4_CULLMODE_CCW;
00659       break;
00660    case PIPE_WINDING_BOTH:
00661       cso->LIS4 |= S4_CULLMODE_BOTH;
00662       break;
00663    }
00664 
00665    {
00666       int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf);
00667 
00668       cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
00669 
00670       if (rasterizer->line_smooth)
00671          cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
00672    }
00673 
00674    {
00675       int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff);
00676 
00677       cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
00678    }
00679 
00680    if (rasterizer->flatshade) {
00681       cso->LIS4 |= (S4_FLATSHADE_ALPHA |
00682                     S4_FLATSHADE_COLOR |
00683                     S4_FLATSHADE_SPECULAR);
00684    }
00685 
00686    cso->LIS7 = fui( rasterizer->offset_units );
00687 
00688 
00689    return cso;
00690 }
00691 
00692 static void i915_bind_rasterizer_state( struct pipe_context *pipe,
00693                                         void *raster )
00694 {
00695    struct i915_context *i915 = i915_context(pipe);
00696 
00697    i915->rasterizer = (struct i915_rasterizer_state *)raster;
00698 
00699    /* pass-through to draw module */
00700    draw_set_rasterizer_state(i915->draw,
00701                           (i915->rasterizer ? i915->rasterizer->templ : NULL));
00702 
00703    i915->dirty |= I915_NEW_RASTERIZER;
00704 }
00705 
00706 static void i915_delete_rasterizer_state(struct pipe_context *pipe,
00707                                          void *raster)
00708 {
00709    FREE(raster);
00710 }
00711 
00712 static void i915_set_vertex_buffers(struct pipe_context *pipe,
00713                                     unsigned count,
00714                                     const struct pipe_vertex_buffer *buffers)
00715 {
00716    struct i915_context *i915 = i915_context(pipe);
00717    /* Because we change state before the draw_set_vertex_buffers call
00718     * we need a flush here, just to be sure.
00719     */
00720    draw_flush(i915->draw);
00721 
00722    memcpy(i915->vertex_buffer, buffers, count * sizeof(buffers[0]));
00723    i915->num_vertex_buffers = count;
00724 
00725    /* pass-through to draw module */
00726    draw_set_vertex_buffers(i915->draw, count, buffers);
00727 }
00728 
00729 static void i915_set_vertex_elements(struct pipe_context *pipe,
00730                                      unsigned count,
00731                                      const struct pipe_vertex_element *elements)
00732 {
00733    struct i915_context *i915 = i915_context(pipe);
00734    /* Because we change state before the draw_set_vertex_buffers call
00735     * we need a flush here, just to be sure.
00736     */
00737    draw_flush(i915->draw);
00738 
00739    i915->num_vertex_elements = count;
00740    /* pass-through to draw module */
00741    draw_set_vertex_elements(i915->draw, count, elements);
00742 }
00743 
00744 
00745 static void i915_set_edgeflags(struct pipe_context *pipe,
00746                                const unsigned *bitfield)
00747 {
00748    /* TODO do something here */
00749 }
00750 
00751 void
00752 i915_init_state_functions( struct i915_context *i915 )
00753 {
00754    i915->pipe.set_edgeflags = i915_set_edgeflags;
00755    i915->pipe.create_blend_state = i915_create_blend_state;
00756    i915->pipe.bind_blend_state = i915_bind_blend_state;
00757    i915->pipe.delete_blend_state = i915_delete_blend_state;
00758 
00759    i915->pipe.create_sampler_state = i915_create_sampler_state;
00760    i915->pipe.bind_sampler_states = i915_bind_sampler_states;
00761    i915->pipe.delete_sampler_state = i915_delete_sampler_state;
00762 
00763    i915->pipe.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
00764    i915->pipe.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
00765    i915->pipe.delete_depth_stencil_alpha_state = i915_delete_depth_stencil_state;
00766 
00767    i915->pipe.create_rasterizer_state = i915_create_rasterizer_state;
00768    i915->pipe.bind_rasterizer_state = i915_bind_rasterizer_state;
00769    i915->pipe.delete_rasterizer_state = i915_delete_rasterizer_state;
00770    i915->pipe.create_fs_state = i915_create_fs_state;
00771    i915->pipe.bind_fs_state = i915_bind_fs_state;
00772    i915->pipe.delete_fs_state = i915_delete_fs_state;
00773    i915->pipe.create_vs_state = i915_create_vs_state;
00774    i915->pipe.bind_vs_state = i915_bind_vs_state;
00775    i915->pipe.delete_vs_state = i915_delete_vs_state;
00776 
00777    i915->pipe.set_blend_color = i915_set_blend_color;
00778    i915->pipe.set_clip_state = i915_set_clip_state;
00779    i915->pipe.set_constant_buffer = i915_set_constant_buffer;
00780    i915->pipe.set_framebuffer_state = i915_set_framebuffer_state;
00781 
00782    i915->pipe.set_polygon_stipple = i915_set_polygon_stipple;
00783    i915->pipe.set_scissor_state = i915_set_scissor_state;
00784    i915->pipe.set_sampler_textures = i915_set_sampler_textures;
00785    i915->pipe.set_viewport_state = i915_set_viewport_state;
00786    i915->pipe.set_vertex_buffers = i915_set_vertex_buffers;
00787    i915->pipe.set_vertex_elements = i915_set_vertex_elements;
00788 }

Generated on Tue Sep 29 06:25:16 2009 for Gallium3D by  doxygen 1.5.4