Here is a list of all struct and union fields with links to the structures/unions they belong to:

- t -

• t : brw_clip_compile
• t1 : brw_clip_compile
• t_wrap_mode : brw_sampler_state
• Table : display_dispatch
• takeDown : _DriBufferPool
• target : pipe_texture
• target_cache : brw_instruction
• temp_flag : i915_fp_compile
• temp_regs : codegen
• temp_vertex_stride : draw_vs_varient_generic
• tempElement() : Storage , StorageSoa
• tempImage : xm_buffer , xmesa_buffer
• templ : i915_sampler_state , i915_rasterizer_state
• Temps : tgsi_exec_machine
• temps_active : ureg_program
• TempsArg : Storage
• tempsUsed : aa_transform_context , pstip_transform_context
• test_fse : draw_context
• tex_cache : softpipe_context
• tex_face : softpipe_tile_cache
• tex_format : st_context
• tex_handle : drmI830Sarea
• tex_level : softpipe_tile_cache
• tex_map : cell_context
• tex_offset : drmI830Sarea
• tex_size : spu_texture , drmI830Sarea
• tex_size_mask : spu_texture
• tex_size_x_mask : spu_texture
• tex_size_y_mask : spu_texture
• tex_slot : aaline_stage , aapoint_stage
• tex_surf : cell_context , softpipe_tile_cache
• tex_surf_map : softpipe_tile_cache
• tex_surface_release : pipe_screen
• tex_usage : pipe_texture
• tex_z : softpipe_tile_cache
• texAge : drmI830Sarea
• texbuffer : i915_state
• texcoord_mode : widepoint_stage
• texcoord_slot : widepoint_stage
• teximage_realloc : st_texture_object
• texList : drmI830Sarea
• text : translate_ctx
• texTemp : aa_transform_context , pstip_transform_context
• texture : trace_texture , pipe_surface , intel_screen , bitmap_cache , st_renderbuffer
• Texture : brw_context , tgsi_instruction_ext_texture
• texture : aaline_stage , pstip_stage , texture_list , tgsi_sampler , cell_context , spu_sampler , spu_global , failover_context , i915_context , softpipe_context , softpipe_tile_cache
• texture_blanket : pipe_screen
• texture_create : pipe_screen
• texture_release : pipe_screen
• texture_save : st_renderbuffer
• TextureFormat : xmesa_buffer
• TextureMipmap : xmesa_buffer
• textures : cso_context , pstip_stage , sct_context
• textures_saved : cso_context
• textures_used : sct_context
• TextureTarget : xmesa_buffer
• third_bo_handle : drmI830Sarea
• third_handle : drmI830Sarea
• third_offset : drmI830Sarea
• third_size : drmI830Sarea
• third_tiled : drmI830Sarea
• thread0 : brw_clip_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state , brw_wm_unit_state
• thread1 : brw_clip_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state , brw_wm_unit_state
• thread2 : brw_clip_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state , brw_wm_unit_state
• thread3 : brw_wm_unit_state , brw_clip_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state
• thread4 : brw_vs_unit_state , brw_clip_unit_state , brw_sf_unit_state , brw_gs_unit_state
• thread_control : brw_instruction
• thread_dispatch_enable : brw_wm_unit_state
• thread_priority : thread1 , brw_clip_unit_state
• ti : tgsi_transform_context
• tile : softpipe_tile_cache
• tile_walk : brw_surface_state , brw_depthbuffer
• tiled : i915_texture
• tiled_data : cell_texture
• tiled_surface : brw_surface_state , brw_depthbuffer
• tiles_per_row : spu_texture
• timeFreed : _DriKernelBO
• timeout_exception_enable : thread1
• timeoutHead : _DriKernelBO
• timeoutList : _DriFreeSlabManager
• timestamp : softpipe_screen
• timezone : aub_file_header
• tmp : draw_stage , brw_sf_compile , brw_vs_compile
• tmp0 : aa_transform_context
• tmp1 : brw_clip_compile
• tmp_index : brw_wm_compile
• tmp_start : brw_wm_compile
• token : tgsi_any_token
• Token : tgsi_full_token
• Tokens : tgsi_parse_context
• tokens : translate_ctx
• Tokens : tgsi_exec_machine
• tokens : pipe_shader_state , ureg_tokens
• tokens_cur : translate_ctx
• tokens_end : translate_ctx
• tokens_out : tgsi_transform_context
• topology : brw_3d_primitive
• total : timed_winsys
• total_grf : brw_clip_prog_data , brw_vs_prog_data , brw_wm_prog_data , brw_gs_prog_data , brw_sf_prog_data
• total_nblocksy : brw_texture , i915_texture
• total_scratch : brw_wm_prog_data
• total_size : brw_context
• tracked_state : st_context
• transform_declaration : tgsi_transform_context
• transform_immediate : tgsi_transform_context
• transform_instruction : tgsi_transform_context
• translate : vbuf_stage , pt_emit , pipe_viewport_state , fetch_emit_middle_end , translate_generic , pt_fetch
• transparent_type : _OverlayInfo
• tri : draw_stage
• trifan_pv : brw_sf_unit_state
• tristrip_pv : brw_sf_unit_state
• trunc() : Instructions
• twoside : draw_context
• tx : setup_stage
• ty : setup_stage
• Type : tgsi_token
• type : brw_reg
• Type : tgsi_instruction_ext_nv
• type : gallivm_ir
• Type : tgsi_immediate , tgsi_src_register_ext , tgsi_src_register_ext_swz , tgsi_instruction_ext_predicate
• type : aub_block_header , xmesa_buffer
• Type : tgsi_dst_register_ext_modulate , tgsi_instruction_ext_label , tgsi_instruction_ext_texture
• type : gallivm_prog , gallivm_interpolate
• Type : tgsi_dst_register_ext
• type : cpu_detect_caps
• Type : tgsi_instruction_ext , tgsi_src_register_ext_mod , tgsi_instruction , tgsi_declaration , tgsi_dst_register_ext_concode , tgsi_dst_register_ext_predicate

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