Here is a list of all struct and union fields with links to the structures/unions they belong to:

- d -

• d : cso_hash , brw_reg , brw_instruction
• da1 : brw_instruction
• da16 : brw_instruction
• dadx : tgsi_interp_coef , spu_interp_coef , interp_coef
• dady : tgsi_interp_coef , spu_interp_coef , interp_coef
• data : cso_blend , gdi_softpipe_buffer , xm_buffer , cso_depth_stencil_alpha , aub_buffer
• Data : sw_pipe_buffer
• data : cso_rasterizer , cso_fragment_shader , cso_vertex_shader , cso_sampler , cso_hash , vertex_header , malloc_buffer , pb_user_buffer , cell_fragment_shader_state , vertex_header , softpipe_cached_tile , st_softpipe_buffer , _DriBufferPool , drmI830MMIO
• data0 : brw_pipe_control
• data1 : brw_pipe_control
• data_return_format : brw_surface_state
• data_size : brw_cache_item
• data_type : brw_instruction
• datatype : pipe_format_info
• DataType : tgsi_immediate
• day : aub_file_header
• ddx() : Instructions
• ddy() : Instructions
• debug : i915_context
• debug_control : brw_instruction
• debug_flags : cell_init_info , cell_context
• decl : tgsi_any_token , i915_fp_compile
• decl_range : tgsi_any_token
• decl_s : i915_fp_compile
• decl_semantic : tgsi_any_token
• decl_t : i915_fp_compile
• Declaration : tgsi_full_declaration
• DeclarationRange : tgsi_full_declaration
• declarations : cell_shader_info , i915_fp_compile
• Declarations : tgsi_exec_machine , spu_exec_machine
• declareFunc() : Instructions
• declareImmediates() : StorageSoa
• declarePrintf() : Instructions
• default_color_mode : brw_sampler_state
• default_color_pointer : brw_sampler_state
• default_texture : st_context
• delayed : fenced_buffer_list , pb_cache_manager
• delayedBuffers : _DriSlabSizeHeader
• delete : draw_vertex_shader , sp_fragment_shader
• delete_blend_state : pipe_context
• delete_depth_stencil_alpha_state : pipe_context
• delete_fs_state : pipe_context
• delete_rasterizer_state : pipe_context
• delete_sampler_state : pipe_context
• delete_state : cso_blend , cso_depth_stencil_alpha , cso_rasterizer , cso_fragment_shader , cso_vertex_shader , cso_sampler
• delete_vs_state : pipe_context
• delta_xy : brw_wm_compile
• dependency_control : brw_instruction
• depth : brw_depthbuffer , brw_surface_state , quad_header_output , pipe_depth_stencil_alpha_state , pipe_texture , pixelformat_info
• depth16 : softpipe_cached_tile
• depth32 : softpipe_cached_tile
• depth_bits : pipe_format_info
• depth_bo_handle : drmI830Sarea
• depth_clear_value : spu_framebuffer
• depth_coef_urb_read_offset : thread1
• depth_format : cell_command_framebuffer , spu_framebuffer
• depth_handle : drmI830Sarea
• depth_LIS6 : i915_depth_stencil_state
• depth_offset : brw_wm_unit_state , drmI830Init , drmI830Sarea
• depth_offset_clamp : brw_global_depth_offset_clamp
• depth_offset_disable : brw_depthbuffer
• depth_pitch : brw_texture , drmI830Init
• depth_size : drmI830Sarea
• depth_stall_enable : brw_3d_control , brw_pipe_control
• depth_start : cell_command_framebuffer , spu_framebuffer
• depth_stencil : cso_context , cell_context , failover_context , i915_context , softpipe_context , softpipe_tile_cache , st_context
• depth_stencil_alpha : spu_global
• depth_stencil_hash : cso_cache
• depth_stencil_saved : cso_context
• depth_stride : i915_texture
• depth_test : softpipe_context , brw_cc_unit_state
• depth_test_function : brw_cc_unit_state
• depth_tiled : drmI830Sarea
• depth_write_enable : brw_cc_unit_state
• depthbits : pixelformat_depth_info
• depthstencil : blit_state , gen_mipmap_state
• DepthStencil : brw_context
• desc : pb_slab_manager , pb_slab_range_manager
• desiredNumBuffers : _DriSlabPool
• dest : brw_3d_control
• dest_addr : brw_3d_control , brw_pipe_control
• dest_addr_type : brw_3d_control , brw_pipe_control
• dest_address_mode : brw_instruction
• dest_blend_factor : brw_cc_unit_state
• dest_depth_reg : brw_wm_prog_key
• dest_horiz_stride : brw_instruction
• dest_indirect_offset : brw_instruction
• dest_location : intel_be_batchbuffer
• dest_org_hbias : brw_sf_unit_state
• dest_org_vbias : brw_sf_unit_state
• dest_reg_file : brw_instruction
• dest_reg_nr : brw_instruction
• dest_reg_type : brw_instruction
• dest_subreg_nr : brw_instruction
• dest_writemask : brw_instruction
• destreg__conditonalmod : brw_instruction
• destroy : draw_stage , draw_pt_front_end , draw_pt_middle_end , vbuf_render , draw_vs_varient , pb_vtbl , pb_manager , util_cache , handle_table , i915_winsys , brw_winsys , quad_stage , pipe_context , pipe_screen , pipe_winsys , _DriBufferPool
• destroy_query : pipe_context
• DestroyContext : _glxapi_table
• DestroyGLXPbufferSGIX : _glxapi_table
• DestroyGLXPixmap : _glxapi_table
• DestroyGLXVideoSourceSGIX : _glxapi_table
• DestroyPbuffer : _glxapi_table
• DestroyPixmap : _glxapi_table
• DestroyWindow : _glxapi_table
• DestsArg : Storage
• det : prim_header , brw_sf_compile
• device : intel_framebuffer , egl_drm_drawable , intel_be_batchbuffer , intel_be_context , intel_device , drm_driver , egl_drm_context
• deviceID : intel_screen , _I830DRIRec , intel_device , egl_drm_device
• dib_hDC : stw_framebuffer
• dim : tgsi_any_token
• Dimension : tgsi_dimension , tgsi_src_register , tgsi_dst_register
• dir : brw_clip_compile
• dirty : brw_tracked_state , spu_vs_context , cell_context , failover_context , i915_context , i915_tracked_state , brw_context , softpipe_context , st_tracked_state , st_context
• dirty_state : intel_be_batchbuffer
• disable : brw_sampler_state
• disable_2x2_trifilter : brw_sf_unit_state
• disable_zero_pix_trifilter : brw_sf_unit_state
• dispatch_grf_start_reg : thread3
• display : xmesa_visual
• dither : pipe_blend_state
• dither_enable : brw_cc_unit_state
• div() : Instructions
• do_flat_shading : brw_clip_prog_key , brw_sf_prog_key
• do_point_sprite : brw_sf_prog_key
• do_twoside_color : brw_sf_prog_key
• do_unfilled : brw_clip_prog_key
• domain : ureg_program
• dot2add() : Instructions
• dp : brw_clip_compile
• dp1 : brw_clip_compile
• dp2() : Instructions
• dp3() : InstructionsSoa , Instructions
• dp4() : InstructionsSoa , Instructions
• dp_read : brw_instruction
• dp_write : brw_instruction
• dph() : Instructions
• dpPrev : brw_clip_compile
• Dpy : xlib_egl_surface , display_dispatch
• DR1 : drmI830CmdBuffer , drmI830BatchBuffer
• DR4 : drmI830CmdBuffer , drmI830BatchBuffer
• draw : pipe_context , draw_vertex_shader , draw_vs_varient_generic , cell_context , softpipe_context , draw_stage , pt_emit , vcache_frontend , vbuf_render , fetch_pipeline_middle_end , i915_context , varray_frontend , fetch_emit_middle_end , fetch_shade_emit , st_context , pt_fetch , pt_post_vs
• draw_arrays : pipe_context , vbuf_render
• draw_count : vcache_frontend
• draw_data : cell_vertex_shader_state , sp_vertex_shader
• draw_elements : pipe_context
• draw_elts : varray_frontend , vcache_frontend
• draw_range_elements : pipe_context
• draw_shader : st_vertex_program
• drawable : drm_surface , xmesa_buffer
• drawpix : st_context
• driBO : intel_be_buffer
• driBuffers : _DriBufferList
• driDrawable : intel_context
• driFd : intel_context
• driHwLock : intel_context
• driScreen : intel_context
• driver : draw_context
• driver_bind_fs_state : pstip_stage , aapoint_stage , aaline_stage
• driver_bind_sampler_states : aaline_stage , pstip_stage
• driver_create_fs_state : aaline_stage , pstip_stage , aapoint_stage
• driver_delete_fs_state : aaline_stage , aapoint_stage , pstip_stage
• driver_fetch_max : varray_frontend
• driver_fs : aapoint_fragment_shader , pstip_fragment_shader , aaline_fragment_shader
• driver_private : draw_context
• driver_set_polygon_stipple : pstip_stage
• driver_set_sampler_textures : pstip_stage , aaline_stage
• driver_shader : st_fragment_program , st_vertex_program
• drmBOVirtual : intel_be_batchbuffer
• drmBuffers : _DriBufferList
• drmFD : egl_drm_device
• drmMinor : intel_screen
• ds : i915_rasterizer_state
• dsa : cell_command_fragment_ops
• dst : tgsi_any_token , Instructions
• dst_ext_code : tgsi_any_token
• dst_ext_mod : tgsi_any_token
• dst_ext_pred : tgsi_any_token
• dst_offset : brw_vertex_element_state
• DstRegister : tgsi_full_dst_register
• DstRegisterExtConcode : tgsi_full_dst_register
• DstRegisterExtModulate : tgsi_full_dst_register
• dummy : I830DRIContextRec , intel_device , I830ConfigPrivRec
• dummyContext : intel_screen
• dump_fs : softpipe_context
• dump_on_unmap : aub_buffer
• dw1 : brw_reg
• dword : header_union , brw_depthbuffer , brw_array_state , brw_indexbuffer
• dword1 : brw_depthbuffer
• dword2 : brw_3d_control
• dword2_base_addr : brw_depthbuffer
• dword3 : brw_3d_control , brw_depthbuffer
• dword4 : brw_depthbuffer
• dx : edge
• dx0 : brw_sf_compile
• dx2 : brw_sf_compile
• dxdy : edge
• dy : edge
• dy0 : brw_sf_compile
• dy2 : brw_sf_compile
• dynamic : i915_state

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