- p -

• Pad : ureg_src
• pad : prim_header , brw_array_state , brw_3d_primitive , brw_pipeline_select , brw_pipe_control , brw_mi_flush , brw_urb_fence , brw_constant_buffer_state , brw_indirect , brw_vf_statistics , brw_constant_buffer , brw_state_base_address , brw_depthbuffer , brw_state_prefetch , brw_system_instruction_pointer , vertex_header , brw_gs_prog_key , brw_indexbuffer , brw_sampler_state , brw_surface_state , brw_line_stipple , brw_vertex_buffer_state , brw_vertex_element_state , brw_3d_control , brw_pipelined_state_pointers , brw_urb_immediate , brw_instruction , brw_polygon_stipple_offset , brw_vs_prog_key
• pad0 : brw_reg , brw_polygon_stipple_offset , brw_constant_buffer_state , thread0 , thread1 , thread2 , thread3 , brw_clip_unit_state , brw_cc_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state , brw_wm_unit_state , brw_sampler_state , brw_surface_state , brw_vertex_element_state , brw_instruction , aub_file_header , aub_block_header , brw_clip_prog_key
• pad1 : brw_instruction , aub_file_header , aub_block_header
• Pad1 : ureg_dst
• pad1 : brw_clip_prog_key , brw_reg , thread0 , thread1 , thread3 , brw_clip_unit_state , brw_cc_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state , brw_wm_unit_state , brw_urb_immediate
• pad2 : brw_depthbuffer , thread3 , brw_clip_unit_state , brw_cc_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state , brw_wm_unit_state , brw_instruction
• Pad2 : ureg_dst
• pad3 : thread1 , thread3 , brw_clip_unit_state , brw_sf_unit_state , brw_gs_unit_state , brw_vs_unit_state
• pad4 : brw_clip_unit_state
• Padding : tgsi_version , tgsi_processor , tgsi_token , tgsi_declaration , tgsi_declaration_semantic , tgsi_immediate , tgsi_instruction , tgsi_instruction_ext , tgsi_instruction_ext_nv , tgsi_instruction_ext_label , tgsi_instruction_ext_texture , tgsi_instruction_ext_predicate , tgsi_src_register_ext , tgsi_src_register_ext_swz , tgsi_src_register_ext_mod , tgsi_dimension , tgsi_dst_register , tgsi_dst_register_ext , tgsi_dst_register_ext_concode , tgsi_dst_register_ext_modulate , tgsi_dst_register_ext_predicate
• pageAlignment : _DriKernelBO , _DriSlabPool
• pageSize : _DriSlabPool
• param : drmI830GetParam , drmI830SetParam
• param_state : st_fragment_program , st_vertex_program
• parent : _DriSlabBuffer
• passthrough_fs : st_context
• pattern : stipple_stage , brw_line_stipple
• payload_coef : brw_wm_compile
• payload_depth : brw_wm_compile
• pbPixels : stw_framebuffer
• pci_id : i915_screen , brw_context , brw_screen
• per_thread_scratch_space : thread2
• perf_boxes : drmI830Sarea
• persp_mask : brw_sf_prog_key
• pf_active : drmI830Sarea
• pf_current_page : drmI830Sarea
• pf_enabled : drmI830Sarea
• pipe : cso_context , aaline_stage , aapoint_stage , pstip_stage , tgsi_sampler , ureg_program , blit_state , gen_mipmap_state , cell_context , spu_sampler , failover_context , i915_context , brw_context , softpipe_context , trace_context , st_context , drmI830VBlankPipe , intel_device , xlib_egl_context , st_context
• pipe_winsys : aub_brw_winsys
• pipeline : draw_context
• pipeline_select : brw_pipeline_select
• pitch : fetch_shade_emit , cell_array_info , spu_vs_context , brw_array_state , brw_depthbuffer , brw_surface_state , brw_vertex_buffer_state , pipe_vertex_buffer , intel_screen , drmI830Init , drmI830Sarea , egl_drm_frontbuffer , aub_dump_bmp
• pitch_bits : drmI830Init
• pixel_scoreboard_clear : brw_instruction
• pixel_w : brw_wm_compile
• pixel_xfer : st_context
• pixel_xy : brw_wm_compile
• pixelformat : stw_framebuffer
• pixelmap_enabled : st_context
• pixelmap_texture : st_context
• pixelMaps : state_key
• plane : cell_command_vs , clipper , draw_context , spu_vs_context
• plane_equation : brw_clip_compile
• planeA_h : drmI830Sarea
• planeA_w : drmI830Sarea
• planeA_x : drmI830Sarea
• planeA_y : drmI830Sarea
• planeB_h : drmI830Sarea
• planeB_w : drmI830Sarea
• planeB_x : drmI830Sarea
• planeB_y : drmI830Sarea
• planemask : brw_clip_compile
• point : draw_stage
• point_coord_fs_input : widepoint_stage
• point_rast_rule : brw_sf_unit_state
• point_size : fetch_emit_middle_end , vbuf_stage , brw_sf_unit_state , pipe_rasterizer_state
• point_size_max : widepoint_stage , pipe_rasterizer_state
• point_size_min : widepoint_stage , pipe_rasterizer_state
• point_size_per_vertex : pipe_rasterizer_state
• point_smooth : pipe_rasterizer_state
• point_sprite : draw_context , pipe_rasterizer_state
• Pointer : tgsi_full_immediate
• pointer : pointer_hack
• points : pixelformat_score
• poly_smooth : pipe_rasterizer_state
• poly_stipple : failover_context , cell_context , i915_context , softpipe_context , st_context
• poly_stipple_enable : pipe_rasterizer_state
• polygon_offset_scale : st_context
• polygon_stipple : brw_wm_unit_state , softpipe_context
• PolygonStipple : brw_context
• pool : brw_cache , brw_context , intel_be_buffer , aub_pipe_winsys , _DriBufferObject
• poolOffset : intel_be_batchbuffer , _DriBufferPool
• pop_count : brw_instruction
• pos_idx : brw_prog_info
• pos_slot : aaline_stage , aapoint_stage
• posCoef : setup_context , quad_header
• Position : tgsi_parse_context
• position_output : draw_vertex_shader , draw_context
• post_indent : tgsi_opcode_info
• post_sync_operation : brw_pipe_control
• post_vs : fetch_pipeline_middle_end
• pq : st_query_object
• pre_dedent : tgsi_opcode_info
• Precision : tgsi_instruction_ext_nv
• precision : brw_instruction
• PredDstIndex : tgsi_instruction_ext_predicate
• predicate_control : brw_instruction
• predicate_inverse : brw_instruction
• PredSrcIndex : tgsi_dst_register_ext_predicate
• PredSwizzleW : tgsi_dst_register_ext_predicate
• PredSwizzleX : tgsi_dst_register_ext_predicate
• PredSwizzleY : tgsi_dst_register_ext_predicate
• PredSwizzleZ : tgsi_dst_register_ext_predicate
• PredWriteMask : tgsi_instruction_ext_predicate
• preferredFormat : cell_winsys
• prefetch_count : brw_state_prefetch
• prefetch_pointer : brw_state_prefetch
• prefilter : pipe_sampler_state
• prepare : sp_fragment_shader , draw_vertex_shader , draw_pt_middle_end , draw_pt_front_end
• prev : list_head , mem_block
• prev_free : mem_block
• prevLockFile : intel_context
• prevLockLine : intel_context
• prim : cell_vbuf_render , quad_header_input , rastpos_stage , i915_vbuf_render , softpipe_vbuf_render , pt_emit , fetch_pipeline_middle_end , fetch_shade_emit
• prim_type : cell_command_render
• primitive : brw_sf_prog_key , brw_gs_prog_key , brw_clip_prog_key , brw_context
• Primitives : tgsi_exec_machine , spu_exec_machine
• print_addresses : debug_stream
• printf : dump_ctx
• priv : egl_drm_context , egl_drm_device , pipe_context , egl_drm_drawable
• private : _DriFenceMgr
• Private : st_framebuffer
• private : _DriBufferObject , _DriFenceObject
• proc : extension_entry
• Processor : tgsi_full_header
• processor : ureg_program
• Processor : spu_exec_machine , tgsi_processor
• processor : tgsi_any_token , tgsi_iterate_context
• Processor : tgsi_exec_machine
• prog_active : brw_context
• prog_data : brw_wm_compile , brw_context , brw_gs_compile , brw_context , brw_sf_compile , brw_vs_compile , brw_context , brw_clip_compile , brw_context
• prog_gs_offset : brw_context
• program : i915_fp_compile , i915_fragment_shader , brw_vertex_program , brw_fragment_program , st_context
• program_computes_depth : brw_wm_unit_state
• program_id : brw_context
• program_len : i915_fragment_shader
• program_string_id : brw_vs_prog_key , brw_wm_prog_key
• program_uses_depth : brw_wm_unit_state
• program_uses_killpixel : brw_wm_unit_state
• prolog : tgsi_iterate_context
• proposedFlags : _DriSlabPool
• provider : pb_slab_manager , pb_cache_manager , pb_slab_range_manager , fenced_pb_manager
• provider1 : pb_alt_manager
• provider2 : pb_alt_manager
• psize_idx : brw_prog_info
• psize_slot : widepoint_stage , aapoint_stage , softpipe_context
• pstip_fs : pstip_fragment_shader
• pstipple : draw_context
• pt : st_texture_object , st_texture_image , draw_context
• ptr : str_dump_ctx , util_strbuf , i915_batchbuffer , debug_stream
• pv : brw_sf_compile

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